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MSP3410D データシート(PDF) 39 Page - Micronas |
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MSP3410D データシート(HTML) 39 Page - Micronas |
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39 / 83 page  PRELIMINARY DATA SHEET MSP 34x0D Micronas 39 7.2. DSP Read Registers: Table and Addresses Table 7–2: DSP Read Registers; Subaddress: 13hex; these registers are not writable. DSP Read Register Address High/Low Output Range Stereo detection register 0018hex H[80hex ... 7Fhex] 8 bit two’s complement Quasi-peak readout left 0019hex H&L [0000hex ... 7FFFhex] 16 bit two’s complement Quasi-peak readout right 001Ahex H&L [0000hex ... 7FFFhex] 16 bit two’s complement DC level readout FM1/Ch2-L 001Bhex H&L [8000hex ... 7FFFhex] 16 bit two’s complement DC level readout FM2/Ch1-R 001Chex H&L [8000hex ... 7FFFhex] 16 bit two’s complement MSP hardware version code 001Ehex H[00hex ... FFhex] MSP major revision code L [00hex ... FFhex] MSP product code 001Fhex H[00hex ... 0Ahex] MSP ROM version code L [00hex ... FFhex] |
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