T89C5115-RATIM datasheet(30/105 Pages) ATMEL

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T89C5115

4128A–8051–04/02

FM0 Memory Architecture

The Flash memory is made up of 4 blocks (see Figure 11):

The memory array (user space) 16-KB.

The Extra Row.

The Hardware security bits.

The column latch registers.

User Space

This space is composed of a 16-KB Flash memory organized in 128 pages of 128 bytes.

It contains the user’s application code.

Extra Row (XROW)

This row is a part of FM0 and has a size of 128 bytes. The extra row may contain infor-

mation for boot loader usage.

Hardware security Byte

The Hardware Security Byte space is a part of FM0 and has a size of 1 byte.

The 4 MSB can be read/written by software, the 4 LSB can only be read by software and

written by hardware in parallel mode.

Column Latches

The column latches, also part of FM0, have a size of full page (128 bytes).

The column latches are the entrance buffers of the three previous memory locations

(user array, XROW and Hardware security byte).

Cross Flash Memory Access

Description

The FM0 memory can be program only from FM1. Programming FM0 from FM0 or from

external memory is impossible.

The FM1 memory can be program only by parallel programming.

The Table 19 show all software flash access allowed.

Table 19. Cross Flash Memory Access

Action

FM0

(user Flash)

FM1

(boot Flash)

FM0

(user Flash)

Read

Load column latch

Write

FM1

(boot flash)

Read

Load column latch

Write

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