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FT260Q-R データシート(PDF) 21 Page - Future Technology Devices International Ltd. |
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FT260Q-R データシート(HTML) 21 Page - Future Technology Devices International Ltd. |
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21 / 61 page ![]() Copyright © Future Technology Devices International Limited 21 FT260 HID-CLASS USB TO UART/I2C BRIDGE IC Version 1.1 Document No.: FT_001272 Clearance No.: FTDI#484 T6 >= 0 input hold time requirement from SDA to SCL falling edge when I2C as master T7 2*(1+N)*T0 Start bit setup time to SCL falling edge T8 4*(1+N)*T0 Start bit hold time to SCL falling edge T9 2*(1+N)*T0 Stop bit setup time to SCL rising edge T10 2*(1+N)*T0 Stop bit hold time to SCL rising edge T11 4*(1+N)*T0 Bus free time between Start and Stop bit Table 5.2 I2C Timing for VCCIO=3.3V *Note that N can be ranged from 1 to 255 |
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