| データシートサーチシステム |
|
IOBUS12 データシート(PDF) 32 Page - Future Technology Devices International Ltd. |
|
|
|||||||||||||||||||||||||||||
IOBUS12 データシート(HTML) 32 Page - Future Technology Devices International Ltd. |
|
32 / 88 page ![]() 32 C opyright © Future T ec hnology Devic es I nternational Limited Datasheet Vinculum-II Embedded Dual USB Host Controller IC V ers ion 1 .7 Doc ument N o.: FT _000138 C learance N o.: FT DI# 1 43 5.4 I/O Mux Group 1 Available Input signals Available output signals 64 Pin Package Available pins 48 Pin Package Available pins 32 Pin Package Available pins uart_rxd uart_dsr# fifo_data[1] fifo_data[5] spi_s0_mosi spi_s1_mosi gpio[A1] gpio[A5] gpio[B1] gpio[B5] gpio[C1] gpio[C5] gpio[D1] gpio[D5] gpio[E1] gpio[E5] fifo_data[1] fifo_data[5] fifo_txe# pwm[1] pwm[5] spi_s0_mosi spi_s1_mosi spi_m_mosi fifo_clkout gpio[A1] gpio[A5] gpio[B1] gpio[B5] gpio[C1] gpio[C5] gpio[D1] gpio[D5] gpio[E1] gpio[E5] 12, 16, 20, 25, 29, 40, 44, 48, 52, 58, 62 12,16, 21, 32, 36, 42, 46 12, 24, 30 Table 5.3 Group 1 Table 5.3 - Input and output signals that are available for all the IOBUS pins that are in group 1. For example if using the 64 pin package device this would allow pins 12, 16, 20, 25, 29, 40, 44, 48, 52, 58 and 62 to be configured as either an input signal (listed in the first column) or a output signal (listed in the second column). |
|
リンク URL |
| ALLDATASHEETはお客様のビジネスに役立ちますか? [ DONATE ] |
Alldatasheetは | 広告 | お問い合わせ | プライバシーポリシー | データシートへのリンク | リンク交換 | メーカーリスト All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |