ST72344S2 datasheet(37/247 Pages) STMICROELECTRONICS

37 / 247 page

ST72344xx, ST2345xx

Central processing unit

Doc ID 12321 Rev 6

37/247

Figure 11.

CPU registers

6.3.1

Condition code register (CC)

Reset value: 111x1xxx

The 8-bit Condition Code register contains the interrupt masks and four flags representative

of the result of the instruction just executed. This register can also be handled by the PUSH

and POP instructions.

These bits can be individually tested and/or controlled by specific instructions.

Arithmetic management bits

Bit 4 = H Half carry.

This bit is set by hardware when a carry occurs between bits 3 and 4 of the ALU during

an ADD or ADC instructions. It is reset by hardware during the same instructions.

0: No half carry has occurred.

1: A half carry has occurred.

This bit is tested using the JRH or JRNH instruction. The H bit is useful in BCD

arithmetic subroutines.

ACCUMULATOR

X INDEX REGISTER

Y INDEX REGISTER

STACK POINTER

CONDITION CODE REGISTER

PROGRAM COUNTER

1I1 H I0 N Z

RESET VALUE = RESET VECTOR @ FFFEh-FFFFh

PCH

PCL

RESET VALUE = STACK HIGHER ADDRESS

RESET VALUE = 1X

11X 1X X

RESET VALUE = XXh

X = Undefined Value

Read/Write

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