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STM8TL52X4 データシート(PDF) 63 Page - STMicroelectronics |
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STM8TL52X4 データシート(HTML) 63 Page - STMicroelectronics |
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63 / 84 page  DocID022344 Rev 7 63/84 STM8TL52x4 STM8TL53x4 Electrical parameters 70 Figure 26. Recommended NRST pin configuration The reset network shown in Figure 26 protects the device against parasitic resets. The user must ensure that the level on the NRST pin can go below the VIL max. level specified in Table 33 . Otherwise the reset is not taken into account internally. For power consumption sensitive applications, the capacity of the external reset capacitor can be reduced to limit the charge/discharge current. If the NRST signal is used to reset the external circuitry, the user must pay attention to the charge/discharge time of the external capacitor to meet the reset timing conditions of the external devices. The minimum recommended capacity is 10 nF. 0.1 F EXTERNAL RESET CIRCUIT STM8TL5xx4 Filter RPU VDD INTERNAL RESET RSTIN |
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