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M95M01-DF データシート(PDF) 18 Page - STMicroelectronics

部品番号 M95M01-DF
部品情報  1-Mbit serial SPI bus EEPROM
PDF  51 Pages
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メーカー  STMICROELECTRONICS [STMicroelectronics]
ホームページ  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

M95M01-DF データシート(HTML) 18 Page - STMicroelectronics

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Instructions
M95M01-DF M95M01-R
18/51
DocID13264 Rev 14
6.2
Write Disable (WRDI)
One way of resetting the Write Enable Latch (WEL) bit is to send a Write Disable instruction
to the device.
As shown in Figure 9, to send this instruction to the device, Chip Select (S) is driven low,
and the bits of the instruction byte are shifted in, on Serial Data Input (D).
The device then enters a wait state. It waits for a the device to be deselected, by Chip Select
(S) being driven high.
The Write Enable Latch (WEL) bit, in fact, becomes reset by any of the following events:
•
Power-up
•
WRDI instruction execution
•
WRSR instruction completion
•
WRITE instruction completion.
Figure 9. Write Disable (WRDI) sequence



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