AD8331 datasheet(18/32 Pages) AD

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AD8331/AD8332

Rev. C | Page 18 of 32

A simplified schematic of the LNA is shown in Figure 59. INH

is capacitively coupled to the source. An on-chip bias generator

centers the output dc levels at 2.5 V and the input voltages at

3.25 V. A capacitor CLMD of the same value as the input coupling

capacitor CINH is connected from the LMD pin to ground.

VPOS

INH

LOP

LMD

LON

CINH

CLMD

CSH

RFB

CFB

Figure 59. Simplified LNA Schematic

The LNA supports differential output voltages as high as

5 V p-p with positive and negative excursions of ±1.25 V, about

a common-mode voltage of 2.5 V. Since the differential gain

magnitude is 9, the maximum input signal before saturation is

± 275 mV or 550 mV p-p. Overload protection ensures quick

recovery time from large input voltages. Since the inputs are

capacitively coupled to a bias voltage near midsupply, very large

inputs can be handled without interacting with the ESD

protection.

Low value feedback resistors and the current-driving capability

of the output stage allow the LNA to achieve a low input-

referred voltage noise of 0.74 nV/√Hz. This is achieved with a

modest current consumption of 10 mA per channel (50 mW).

On-chip resistor matching results in precise gains of 4.5 per side

(9 differential), critical for accurate impedance control. The use

of a fully differential topology and negative feedback minimizes

distortion. Low HD2 is particularly important in second

harmonic ultrasound imaging applications. Differential

signaling enables smaller swings at each output, further

reducing third order distortion.

Active Impedance Matching

The LNA supports active impedance matching through an

external shunt feedback resistor from Pin LON to Pin INH. The

input resistance RIN is given by Equation 5, where A is the

single-ended gain of 4.5, and 6 kΩ is the unterminated input

impedance.

()

CFB is needed in series with RFB, since the dc levels at Pins LON

and INH are unequal. Expressions for choosing RFB in terms of

RIN and for choosing CFB are found in the Applications section.

CSH and the ferrite bead enhance stability at higher frequencies

where the loop gain declines and prevents peaking. Frequency

response plots of the LNA are shown in Figure 19 and Figure 20.

The bandwidth is approximately 130 MHz for matched input

impedances of 50 Ω to 200 Ω and declines at higher source

impedances. The unterminated bandwidth (RFB = ∞) is

approximately 80 MHz.

Each output can drive external loads as low as 100 Ω in addition

to the 100 Ω input impedance of the VGA (200 Ω differential).

Capacitive loading up to 10 pF is permissible. All loads should

be ac-coupled. Typically, Pin LOP output is used as a single-

ended driver for auxiliary circuits, such as those used for

Doppler mode ultrasound imaging, and Pin LON drives RFB.

Alternatively, a differential external circuit can be driven from

the two outputs, in addition to the active feedback termination.

In both cases, important stability considerations discussed in

the Applications section should be carefully observed.

The impedance at each LNA output is 5 Ω. A 0.4 dB reduction

in open-circuit gain results when driving the VGA, and 0.8 dB

with an additional 100 Ω load at the output. The differential

gain of the LNA is 6 dB higher. If the load is less than 200 Ω on

either side, a compensating load is recommended on the

opposite output.

LNA Noise

The input-referred voltage noise sets an important limit on

system performance. The short-circuit input voltage noise of the

LNA is 0.74 nV/√Hz or 0.82 nV/√Hz (at maximum gain),

including the VGA noise. The open-circuit current noise is

2.5 pA/√Hz. These measurements, taken without a feedback

resistor, provide the basis for calculating the input noise and

noise figure performance of the configurations in Figure 60.

Figure 61 and Figure 62 are simulations extracted from these

results, and the 4.1 dB NF measurement with the input actively

matched to a 50 Ω source. Unterminated (RFB = ∞) operation

exhibits the lowest equivalent input noise and noise figure.

Figure 61 shows the noise figure versus source resistance, rising

at low RS, where the LNA voltage noise is large compared to the

source noise, and again at high RS due to current noise. The

VGA’s input-referred voltage noise of 2.7 nV/√Hz is included in

all of the curves.

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