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WM8978GEFL/V データシート(PDF) 66 Page - Wolfson Microelectronics plc

部品番号 WM8978GEFL/V
部品情報  STEREO CODEC WITH SPEAKER DRIVER
PDF  78 Pages
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メーカー  WOLFSON [Wolfson Microelectronics plc]
ホームページ  http://www.wolfsonmicro.com
Logo WOLFSON - Wolfson Microelectronics plc

WM8978GEFL/V データシート(HTML) 66 Page - Wolfson Microelectronics plc

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PP Rev 1.7 January 2005
66
BIASEN
The analogue amplifiers will not operate unless BIASEN is enabled.
REGISTER
ADDRESS
BIT
LABEL
DEFAULT
DESCRIPTION
R1
Power
management 1
3
BIASEN
0
Analogue amplifier bias control
Table 57 Analogue Bias Control
ESTIMATED SUPPLY CURRENTS
When either the DAC or ADC are enabled it is estimated that approximately 4mA will be drawn from
DCVDD when fs=48kHz (This will be lower at lower sample rates). When the PLL is enabled an
additional 700 microamps will be drawn from DCVDD.
Table 58 shows the estimated 3.3V AVDD current drawn by various circuits, by register bit.
REGISTER BIT
AVDD CURRENT (MILLIAMPS)
BUFDCOPEN
0.1
OUT4MIXEN
0.2
OUT3MIXEN
0.2
PLLEN
1.4 (with clocks applied)
MICBEN
0.5
BIASEN
0.3
BUFIOEN
0.1
VMIDSEL
10K=>0.3, less than 0.1 for 100k/500k
ROUT1EN
0.4
LOUT1EN
0.4
BOOSTENR
0.2
BOOSTENL
0.2
INPPGAENR
0.2
INPPGAENL
0.2
ADCENR
x64 (ADCOSR=0)=>2.6, x128 (ADCOSR=1)=>4.9
ADCENL
x64 (ADCOSR=0)=>2.6, x128 (ADCOSR=1)=>4.9
OUT4EN
0.2
OUT3EN
0.2
LOUT2EN
1mA from SPKVDD + 0.2mA from AVDD in 5V mode
ROUT2EN
1mA from SPKVDD + 0.2mA from AVDD in 5V mode
RMIXEN
0.2
LMIXEN
0.2
DACENR
x64 (DACOSR=0)=>1.8, x128(DACOSR=1)=>1.9
DACENL
x64 (DACOSR=0)=>1.8, x128(DACOSR=1)=>1.9
Table 58 AVDD Supply Current



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