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AD9259 データシート(PDF) 36 Page - Analog Devices |
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AD9259 データシート(HTML) 36 Page - Analog Devices |
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36 / 53 page ![]() Data Sheet AD9259 Rev. E | Page 35 of 52 EVALUATION BOARD The AD9259 evaluation board provides all of the support cir- cuitry required to operate the ADC in its various modes and configurations. The converter can be driven differentially using a transformer (default) or a AD8332 driver. The ADC can also be driven in a single-ended fashion. Separate power pins are provided to isolate the DUT from the drive circuitry of the AD8332. Each input configuration can be selected by changing the connection of various jumpers (see Figure 62 to Figure 66). Figure 60 shows the typical bench characterization setup used to evaluate the ac performance of the AD9259. It is critical that the signal sources used for the analog input and clock have very low phase noise (<1 ps rms jitter) to realize the optimum performance of the converter. Proper filtering of the analog input signal to remove harmonics and lower the integrated or broadband noise at the input is also necessary to achieve the specified noise performance. See Figure 62 to Figure 70 for the complete schematics and layout diagrams demonstrating the routing and grounding techniques that should be applied at the system level. POWER SUPPLIES This evaluation board has a wall-mountable switching power supply that provides a 6 V, 2 A maximum output. Connect the supply to the rated 100 V ac to 240 V ac wall outlet at 47 Hz to 63 Hz. The other end of the supply is a 2.1 mm inner diameter jack that connects to the PCB at P503. Once on the PC board, the 6 V supply is fused and conditioned before connecting to three low dropout linear regulators that supply the proper bias to each of the various sections on the board. When operating the evaluation board in a nondefault condition, L504 to L507 can be removed to disconnect the switching power supply. This enables the user to bias each section of the board individually. Use P501 to connect a different supply for each section. At least one 1.8 V supply is needed for AVDD_DUT and DRVDD_DUT; however, it is recommended that separate supplies be used for analog and digital signals and that each supply have a current capability of 1 A. To operate the evaluation board using the VGA option, a separate 5.0 V analog supply (AVDD_5 V) is needed. To operate the evaluation board using the SPI and alternate clock options, a separate 3.3 V analog supply (AVDD_3.3 V) is needed in addition to the other supplies. INPUT SIGNALS When connecting the clock and analog source to the evaluation board, use clean signal generators with low phase noise, such as Rohde & Schwarz SMA or HP8644 signal generators or the equivalent, as well as a 1 m, shielded, RG-58, 50 Ω coaxial cable. Enter the desired frequency and amplitude from the ADC speci- fications tables. Typically, most Analog Devices, Inc., evaluation boards can accept approximately 2.8 V p-p or 13 dBm sine wave input for the clock. When connecting the analog input source, it is recommended to use a multipole, narrow-band, band-pass filter with 50 Ω terminations. Good choices of such band-pass filters are available from TTE, Allen Avionics, and K&L Microwave, Inc. The filter should be connected directly to the evaluation board if possible. OUTPUT SIGNALS The default setup uses the Analog Devices HSC-ADC-FIFO5- INTZ to interface with the Analog Devices standard dual- channel FIFO data capture board (HCS-ADC-EVALCZ). Two of the eight channels can be evaluated at the same time. For more information on the channel settings and optional settings of these boards, visit www.analog.com/FIFO. ROHDE & SCHWARZ, SMA, 2V p-p SIGNAL SYNTHESIZER ROHDE & SCHWARZ, SMA, 2V p-p SIGNAL SYNTHESIZER BAND-PASS FILTER XFMR INPUT CLK CH A TO CH D 14-BIT SERIAL LVDS USB CONNECTION AD9259 EVALUATION BOARD HSC-ADC-EVALCZ FIFO DATA CAPTURE BOARD PC RUNNING ADC ANALYZER AND SPI USER SOFTWARE 1.8V – + – + – + 5.0V 1.8V 6V DC 2A MAX WALL OUTLET 100V TO 240V AC 47Hz TO 63Hz SWITCHING POWER SUPPLY – + 3.3V – + 3.3V SPI SPI SPI INTERPOSER BOARD SPI Figure 60. Evaluation Board Connection |
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