AD7643BSTZ datasheet(19/29 Pages) AD

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AD7643

Rev. 0 | Page 18 of 28

DRIVER AMPLIFIER CHOICE

Although the AD7643 is easy to drive, the driver amplifier

needs to meet the following requirements:

•

For multichannel, multiplexed applications, the driver

amplifier and the AD7643 analog input circuit must be

able to settle for a full-scale step of the capacitor array at an

18-bit level (0.0004%). In the amplifier’s data sheet, settling

at 0.1% to 0.01% is more commonly specified. This could

differ significantly from the settling time at an 18-bit level

and should be verified prior to driver selection. The

AD8021 op amp, which combines ultralow noise and high

gain bandwidth, meets this settling time requirement even

when used with gains up to 13.

•

The noise generated by the driver amplifier needs to be

kept as low as possible to preserve the SNR and transition

noise performance of the AD7643. The noise coming from

the driver is filtered by the AD7643 analog input circuit

1-pole, low-pass filter made by RIN and CIN or by the

external filter, if one is used. The SNR degradation due

to the amplifier is

()

() ⎟⎟

⎟

⎠

⎞

⎜⎜

⎜

⎝

⎛

−

900

20log

3dB

LOSS

SNR

where:

f–3dB is the input bandwidth of the AD7643 (50 MHz) or

the cutoff frequency of the input RC filter shown in Figure 23

(3.9 MHz), if one is used.

N is the noise factor of the amplifier (1 in buffer

configuration).

eN+ and eN− are the equivalent input voltage noise densities

of the op amps connected to IN+ and IN−, in nV/√Hz.

This approximation can be used when the resistances used

around the amplifier are small. If larger resistances are

used, their noise contributions should also be root-sum

squared.

For instance, when using op amps with an equivalent input

noise density of 2.1 nV/√Hz, such as the AD8021, with a

noise gain of 1 when configured as a buffer, degrades the

SNR by only 0.25 dB when using the RC filter in Figure 23,

and by 2.5 dB without it.

•

The driver needs to have a THD performance suitable to

that of the AD7643. Figure 13 gives the THD vs. frequency

that the driver should exceed.

The AD8021 meets these requirements and is appropriate for

almost all applications. The AD8021 needs a 10 pF external

compensation capacitor that should have good linearity as an

NPO ceramic or mica type. Moreover, the use of a noninverting

1 gain arrangement is recommended and helps to obtain the

best signal-to-noise ratio.

The AD8022 can also be used when a dual version is needed

and a gain of 1 is present. The AD829 is an alternative in

applications where high frequency (above 100 kHz) performance is

not required. In applications with a gain of 1, an 82 pF

compensation capacitor is required. The AD8610 is an option

when low bias current is needed in low frequency applications.

Single-to-Differential Driver

For applications using unipolar analog signals, a single-ended-

to-differential driver, as shown in Figure 27, allows for a

differential input into the part. This configuration, when

provided an input signal of 0 to VREF, produces a differential

±VREF with midscale at VREF/2. The 1-pole filter using R = 15 Ω

and C = 2.7 nF provides a corner frequency of 3.9 MHz.

If the application can tolerate more noise, the AD8139

differential driver can be used.

AD8021

ANALOG INPUT

(UNIPOLAR 0V TO 2.048V)

AD8021

IN+

IN–

AD7643

REF

10µF

15Ω

100nF

2.7nF

10pF

5kΩ

590Ω

Figure 27. Single-Ended-to-Differential Driver Circuit

(Internal Reference Buffer Used)

VOLTAGE REFERENCE INPUT

The AD7643 allows the choice of either a very low temperature

drift internal voltage reference, an external 1.2 V reference that

can be buffered using the internal reference buffer, or an

external reference.

Unlike many ADCs with internal references, the internal

reference of the AD7643 provides excellent performance and

can be used in almost all applications.

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