MP8764 ― 12A, 18V, SYNCHRONOUS STEP-DOWN CONVERTER WITH LATCH-OFF OCP

MP8764 Rev. 1.2

www.MonolithicPower.com

19

6/21/2016

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2

R

V

2

1

V

V

2

1

V

V

1

R

RAMP

REF

RAMP

REF

OUT

×

×

+

×

−

−

=

(19)

than C4 for better DC blocking performance, and

should be not larger than 0.47uF considering

start up performance. In case one wants to use

combined with reduced R1 and R2 to limit the

system start up. Be noted that even when the

Cdc is applied, the load and line regulation are

R1

R2

Ceramic

SW

FB

L

R4

C4

Figure 12—Simplified Circuit of Ceramic

Capacitor with DC blocking capacitor

Input Capacitor

The input current to the step-down converter is

discontinuous. Therefore, a capacitor is required

to supply the AC current to the step-down

converter while maintaining the DC input voltage.

Ceramic capacitors are recommended for best

performance. In the layout, it’s recommended to

put the input capacitors as close to the IN pin as

possible.

The

capacitance

varies

significantly

over

temperature. Capacitors with X5R and X7R

ceramic dielectrics are recommended because

they are fairly stable over temperature.

The capacitors must also have a ripple current

rating greater than the maximum input ripple

current of the converter. The input ripple current

can be estimated as follows:

)

V

V

1

(

V

V

I

I

IN

OUT

IN

OUT

OUT

CIN

−

×

×

=

(20)

where:

2

I

I

OUT

(21)

For simplification, choose the input capacitor

whose RMS current rating is greater than half of

the maximum load current.

The input capacitance value determines the input

voltage ripple of the converter. If there is input

voltage ripple requirement in the system design,

choose the input capacitor that meets the

specification

The input voltage ripple can be estimated as

follows:

)

V

V

1

(

V

V

C

F

I

V

IN

OUT

IN

OUT

IN

SW

OUT

IN

−

×

×

×

=

∆

(22)

where:

IN

SW

OUT

IN

C

F

I

4

1

V

×

×

=

∆

(23)

Output Capacitor

The output capacitor is required to maintain the

DC

output

voltage.

Ceramic

or

POSCAP

capacitors are recommended. The output voltage

ripple can be estimated as:

)

C

F

8

1

R

(

)

V

V

1

(

L

F

V

V

OUT

SW

ESR

IN

OUT

SW

OUT

OUT

×

×

+

×

−

×

×

=

∆

(24)

In the case of ceramic capacitors, the impedance

at the switching frequency is dominated by the

capacitance. The output voltage ripple is mainly

caused by the capacitance. For simplification,

the output voltage ripple can be estimated as:

)

V

V

1

(

C

L

F

8

V

V

IN

OUT

OUT

2

SW

OUT

OUT

−

×

×

×

×

=

∆

(25)

The output voltage ripple caused by ESR is very

small. Therefore, an external ramp is needed to

stabilize the system. The external ramp can be

generated through resistor R4 and capacitor C4

following equation 5, 8 and 9.