ACE24AC02A3C

Two-wire Serial EEPROM

VER 1.1

5

Figure 4: Timing diagram for output acknowledge

Device Addressing

The 2-wire serial bus protocol mandates an 8 bits device address word after a START bit condition to

invoke valid read or write command. The first four most significant bits of the device address must be

1010, which is common to all serial EEPROM devices. The next three bits are device address bits. These

three device address bits (5

match is made, the EEPROM device outputs an ACKNOWLEDGE signal after the 8

otherwise the chip will go into STANDBY mode.

The last or 8

a “0” is detected, the device enters programming mode.

Write Operations

(A)

Byte Write

A byte write operation starts when a micro-controller sends a START bit condition, follows by a

proper EEPROM device address and then a write command. If the device address bits match the

chip select address, the EEPROM device will acknowledge at the 9th clock cycle. The

micro-controller will then send the rest of the lower 8 bits word address. At the 18th cycle, the

EEPROM will acknowledge the 8-bit address word. The micro- controller will then transmit the 8 bit

data. Following an ACKNOWLDEGE signal from the EEPROM at the 27th clock cycle, the

micro-controller will issue a STOP bit. After receiving the STOP bit, the EEPROM will go into a

self-timed programming mode during which all external inputs will be disabled. After a programming

time of TWC, the byte programming will finish and the EEPROM device will return to the STANDBY

mode.

(B)

Page Write

A page write is similar to a byte write with the exception that one to sixteen bytes can be

programmed along the same page or memory row. All ACE24AC02A3C are organized to have 16

bytes per memory row or page.