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AD5721 データシート(PDF) 4 Page - Analog Devices

部品番号 AD5721
部品情報  Multiple Range, 16-/12-Bit Bipolar/Unipolar, Voltage Output DACs
PDF  31 Pages
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メーカー  AD [Analog Devices]
ホームページ  http://www.analog.com
Logo AD - Analog Devices

AD5721 データシート(HTML) 4 Page - Analog Devices

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AD5761/AD5721
Data Sheet
Rev. C | Page 4 of 31
Parameter2
Min
Typ
Max
Unit
Test Conditions/Comments
Capacitive Load Stability
1
nF
Headroom
0.5
1
V
RLOAD = 1 kΩ for all ranges except 0 V to16 V and 0 V
to 20 V ranges (RLOAD = 2 kΩ)
Output Voltage TC
±3
ppm FSR/°C
±10 V range, external reference
Short-Circuit Current
25
mA
Short on the VOUT pin
Resistive Load
1
kΩ
All ranges except 0 V to16 V and 0 V to 20 V
2
kΩ
0 V to16 V, 0 V to 20 V ranges
Load Regulation
0.3
mV/mA
Outputs unloaded
DC Output Impedance
0.5
Ω
Outputs unloaded
LOGIC INPUTS5
DVCC = 1.7 V to 5.5 V, JEDEC compliant
Input Voltage
High, VIH
0.7 × DVCC
V
Low, VIL
0.3 × DVCC
V
Input Current
Leakage Current
−1
+1
µA
SDI, SCLK, SYNC
−1
+1
µA
LDAC, CLEAR, RESET pins held high
−55
µA
LDAC, CLEAR, RESET pins held low
Pin Capacitance
5
pF
Per pin, outputs unloaded
LOGIC OUTPUTS (SDO, ALERT)5
Output Voltage
Low, VOL
0.4
V
DVCC = 1.7 V to 5.5 V, sinking 200 µA
High, VOH
DVCC − 0.5
V
DVCC = 1.7 V to 5.5 V, sourcing 200 µA
High Impedance, SDO Pin
Leakage Current
−1
+1
µA
Pin Capacitance
5
pF
POWER REQUIREMENTS
VDD
4.75
30
V
VSS
−16.5
0
V
DVCC
1.7
5.5
V
IDD
5.1
6.5
mA
Outputs unloaded, external reference
ISS
1
3
mA
Outputs unloaded
DICC
0.005
1
µA
VIH = DVCC, VIL = DGND
Power Dissipation
67.1
mW
±11 V operation, outputs unloaded
DC Power Supply Rejection
Ratio (PSRR)5
0.1
mV/V
VDD ± 10%, VSS = −15 V
0.1
mV/V
VSS ±10%, VDD = +15 V
AC PSRR5
80
dB
VDD ±200 mV, 50 Hz/60 Hz, VSS = −15 V; external
reference; CLOAD = unloaded
80
dB
VSS ±200 mV, 50 Hz/60 Hz, VDD = +15 V; external
reference; CLOAD = unloaded
1
For specified performance, headroom requirement is 1 V.
2
Temperature range: −40°C to +125°C, typical at +25°C.
3
External reference means 2 V to 2.85 V with overrange and 2 V to 3 V without overrange.
4
Integral nonlinearity error is specified at ±4 LSB (minimum/maximum) for 0 V to 16 V and 0 V to 20 V ranges with VREFIN = 2.5 V external reference, and for all ranges
with VREFIN = 2 V to 2.85 V with overrange and 2 V to 3 V without overrange.
5
Guaranteed by design and characterization, not production tested.



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