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STC89C53RC データシート(PDF) 23 Page - STCmicro Technology Co,.Ltd

部品番号 STC89C53RC
部品情報  Enhanced 80C51 Central Processing Unit ,6T or 12T per machine cycle
PDF  165 Pages
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メーカー  STC [STCmicro Technology Co,.Ltd]
ホームページ  http://www.stcmicro.com/
Logo STC - STCmicro Technology Co,.Ltd

STC89C53RC データシート(HTML) 23 Page - STCmicro Technology Co,.Ltd

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3.2.4 Special Function Register for RAM
Some SFRs related to RAM are shown as follow.
For fast data movement, STC89xx series support two data pointers. They share the same SFR address and are
switched by the register bit – DPS/AUXR1.0.
FF
80
Special Function
Registers (SFRs)
7F
00
Low 128 Bytes
Internal RAM
FFFF
0000
64K Bytes
External RAM
External RAM
High 128 Bytes
Internal RAM
On-chip Scratch-Pad RAM
1024 Bytes
expanded RAM
03FF
0000
Auxiliary RAM
Bank 0
Bank 0
Bank 0
Bank 0
bit Addressable
07H
0FH
17H
1FH
00H
08H
10H
18H
20H
30H
2FH
7FH
Lower 128 Bytes of internal SRAM
PSW register
bit
B7B6B5B4B3B2B1B0
name
CY
AC
F0
RS1
RS0
OV
F1
P
CY : Carry flag.
AC : Auxilliary Carry Flag.(For BCD operations)
F0 : Flag 0.(Available to the user for general purposes)
RS1: Register bank select control bit 1.
RS0: Register bank select control bit 0.
OV : Overflow flag.
F1 : Flag 1. User-defined flag.
P
: Parity flag.
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