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STC89C53RC データシート(PDF) 24 Page - STCmicro Technology Co,.Ltd |
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STC89C53RC データシート(HTML) 24 Page - STCmicro Technology Co,.Ltd |
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24 / 165 page  AUXR register bit B7 B6 B5 B4 B3 B2 B1 B0 name - - - - - - EXTRAM ALEOFF B7 ~ B3 : resevered. EXTRAM : Internal/External RAM access 0 : For RD+ series, on-chip auxiliary RAM is enabled and located at the address 0x0000 to 0x03FF. And if address over 0x03FF, off-chip external RAM becomes the target automatically. For RC seires, on-chip auxiliary RAM is enabled and located at the address 00H to FFH. And if address over FFH, off-chip external RAM becomes the target automatically. 1 : On-chip auxiliary RAM is always disabled. ALEOFF : Disable/Enable ALE 0 : ALE is emitted at a constant rate of 1/3 the system clock in 6T mode, 1/6 SYSclk in 12T mode. 1 : ALE is active only during a MOVX or MOVC instruction. AUXR1 register bit B7 B6 B5 B4 B3 B2 B1 B0 name - - - - GF2 - - DPS GF2 : General purpose user-defined Flag. It can be used by software. DPS : DPTR registers select bit. 0 : DPTR0 is selected(Default). 1 : The secondary DPTR(DPTR 1) is switched to use. External RAM 63KB Auxiliary RAM 1KB 0x0000 0x03FF 0x0400 0xFFFF External RAM 64KB FFFFH EXTRAM=0 EXTRAM=1 0000H 24 |
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