STC89C53RC datasheet(49/165 Pages) STC

部品番号	STC89C53RC

部品情報	Enhanced 80C51 Central Processing Unit ,6T or 12T per machine cycle

PDF	165 Pages

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メーカー	STC [STCmicro Technology Co,.Ltd]

ホームページ	http://www.stcmicro.com/

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CPL A

Function:

Complement Accumulator

Description:

Each bit of the Accumulator is logically complemented (one’s complement). Bits which

previously contained a one are changed to a zero and vice-versa. No flags are affected.

Example:

The Accumulator contains 5CH(01011100B). The instruction,

CPL

will leave the Accumulator set to 0A3H (101000011B).

Bytes:

Cycles:

Encoding:

1 1 1 1

0 1 0 0

Operation:

CPL

(A)←

← (A)

CPL bit

Function:

Complement bit

Description:

The bit variable specified is complemented. A bit which had been a one is changed to zero

and vice-versa. No other flags are affected. CLR can operate on the carry or any directly

addressable bit.

Note:When this instruction is used to modify an output pin, the value used as the original

data will be read from the output data latch, not the input pin.

Example:

Port 1 has previously been written with 5DH (01011101B). The instruction,

CLR

P1.1

CLR

P1.2

will leave the port set to 59H (01011001B).

CPL C

Bytes:

Cycles:

Encoding:

1 0 1 1

0 0 1 1

Operation:

CPL

← (C)

CPL bit

Bytes:

Cycles:

Encoding:

1 0 1 1

0 0 1 0

bit address

Operation:

CPL

(bit) ←

← (bit)

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