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GD25VE64CSIG データシート(PDF) 47 Page - GigaDevice Semiconductor (Beijing) Inc.

部品番号 GD25VE64CSIG
部品情報  2.5V Uniform Sector Dual and Quad Serial Flash
PDF  62 Pages
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メーカー  GIGADEVICE [GigaDevice Semiconductor (Beijing) Inc.]
ホームページ  http://www.gigadevice.com/
Logo GIGADEVICE - GigaDevice Semiconductor (Beijing) Inc.

GD25VE64CSIG データシート(HTML) 47 Page - GigaDevice Semiconductor (Beijing) Inc.

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2.5V Uniform Sector
Dual and Quad Serial Flash
GD25VE64C
47
8. ELECTRICAL CHARACTERISTICS
8.1. POWER-ON TIMING
Figure 40. Power-on Timing Diagram
Table6. Power-Up Timing and Write Inhibit Threshold
Symbol
Parameter
Min.
Max.
Unit
tVSL
VCC (min.) to device operation
5
ms
VWI
Write Inhibit Voltage
1.5
2.1
V
VPWD
VCC voltage needed to below VPWD for ensuring initialization will occur
0.5
V
tPWD
The minimum duration for ensuring initialization will occur
300
us
8.2. INITIAL DELIVERY STATE
The device is delivered with the memory array erased: all bits are set to 1(each byte contains FFH). The Status Register
bits are set to 0, except DRV0 bit (S21) is set to 1.
8.3. ABSOLUTE MAXIMUM RATINGS
Parameter
Value
Unit
Ambient Operating Temperature
-40 to 85
℃
Storage Temperature
-65 to 150
℃
Applied Input / Output Voltage
-0.6 to VCC+0.4
V
Transient Input / Output Voltage (note: overshoot)
-2.0 to VCC+2.0
V
VCC
-0.6 to 4.2
V
VCC(max.)
VCC(min.)
tVSL
Chip Selection is not allowed
Full Device
Access
Allowed
Time
VPWD(max.)
tPWD
VCC



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