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JS28F320J3A-150 データシート(PDF) 21 Page - Intel Corporation

部品番号 JS28F320J3A-150
部品情報  Intel StrataFlash Memory (J3)
PDF  72 Pages
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メーカー  INTEL [Intel Corporation]
ホームページ  http://www.intel.com
Logo INTEL - Intel Corporation

JS28F320J3A-150 データシート(HTML) 21 Page - Intel Corporation

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256-Mbit J3 (x8/x16)
Datasheet
21
VPENH
VPEN during Block Erase,
Program, or Lock-Bit Operations
2.7
3.6
V
3,4
VLKO
VCC Lockout Voltage
2.0
V
5
NOTES:
1. Includes STS.
2. Sampled, not 100% tested.
3. Block erases, programming, and lock-bit configurations are inhibited when VPEN ≤ VPENLK,
and not guaranteed in the range between VPENLK (max) and VPENH (min), and above VPENH
(max).
4. Typically, VPEN is connected to VCC (2.7 V–3.6 V).
5. Block erases, programming, and lock-bit configurations are inhibited when VCC < VLKO, and
not guaranteed in the range between VLKO (min) and VCC (min), and above VCC (max).
6. Includes all operational modes of the device including standby and power-up sequences.
7. VCC operating condition for standby has to meet typical operationg coditons.
Table 7.
DC Voltage Characteristics
Symbol
Parameter
Min
Max
Unit
Test Conditions
Notes



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