CS98200-EB datasheet(30/60 Pages) CIRRUS

30 / 60 page

DS581PP2

CS98200

Next Generation DVD Processor

functions such as watchdog timers and perfor-

mance monitoring.

The large number of general purpose I/Os of-

fers flexibility in system configurations. An I2C

master allows for control of other I2C devices,

such as a video encoder. An I2C slave port

shares the same pins, and can be used for debug

functions. Interrupts can be generated on specif-

ic or generic events. Infrared inputs can be fil-

tered to make them free of glitches or stored

unfiltered into memory. Control of all the inter-

nal clocks is also possible. There are two sepa-

rate PLLs that are clocked by the 27 MHz clock

input. One PLL generates the main clock and

DRAM interface clock, and the second gener-

ates the Audio 256X/384X clock.

5.6

DVD/ATAPI Interface

The CS98200 has a programmable interface port

which can be configured to connect to industry

standard CD/DVD loaders without external

glue logic. The CD/DVD interface fully sup-

ports many popular CD/DVD loaders. The in-

terface consists of DVD control and data ports

and an optional CD control/data port.

The CS98200 hardware manages the DVD inter-

face and moving data to an arbitrary size input

FIFO in DRAM. The same interface pins can be

optionally configured as a generic 16-bit host

master port. In this mode, the CS98200 can con-

trol up to four devices (using 4 chip select out-

puts), each of which may use different protocol

and timing. The interface can be set up in ATA-

PI mode, to connect directly to any

ATAPI DVD loader (using two chip selects). Si-

multaneously, the other two chip selects can be

configured to connect to other devices, such as a

super I/O chip or hard disk.

A third option is to configure the interface for

micro-less DVD loader operation, which may

also be configured to connect without external

glue logic.

5.7

Serial DVD Interface

The CS98200 has a 4-pin serial port which inter-

faces to the data port of popular low-cost DVD

loaders. This type of loader provides for low

system cost by eliminating the track buffer, in-

terface FIFO, and flow control logic. The

CS98200 contains a large internal SRAM to han-

dle high burst data rates, without requiring re-

verse flow control. The CS98200 performs error

detection, sector number tracking, and interrupt

generation.

5.8

MPEG Video Decoding

Compressed MPEG data is read from the DVD

disk into an input FIFO in DRAM. The data flow

(DMA) controller moves Video packets from the

input FIFO into the MPEG decoder’s input FIFO

(also in DRAM). The DMA controller can also

perform advanced functions such as start code

search, relieving the RISC processors. The Sys-

tem Synchronization function is used to control

the timing of MPEG picture decoding. The

MPEG Video decoder processes I, B, and P

frames, and writes to video frame buffers in

DRAM for output to the display. Special anti-

tearing logic ensures that currently displayed

frame buffers are not overwritten.

5.9

Audio Processing

Compressed Audio data is read from the DVD

disk into an input FIFO in DRAM. The data is

decompressed, then written to a PCM output

FIFO, also in DRAM. Presentation time stamps

(PTS) are extracted from the stream to update

the STC, in order to maintain audio/video syn-

chronization.

The DMA and decompression stages of audio

processing can be done with a combination of

the DMA unit, DSP, and RISC processors. The

DSP is optimized for audio processing, so most

common formats can be handled by the DSP

alone, including AC-3, DTS, MPEG2 audio, and

MP3. The DSP has enough reserve bandwidth

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