HMC525ACHIPS datasheet(26/27 Pages) AD

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HMC525ACHIPS

Data Sheet

Rev. 0 | Page 26 of 27

APPLICATIONS INFORMATION

Figure 100 shows the typical application circuit for the

HMC525ACHIPS. To select the appropriate sideband, an

external 90° hybrid is needed. For applications not requiring

operation to dc, use an off-chip dc blocking capacitor. For

applications that require suppression of the LO signal at the

output, use a bias tee or RF feed as shown in Figure 100. Ensure

that the source or sink current used for LO suppression is <2 mA

for each IFx port to prevent damage to the device. The

common-mode voltage for each IFx port is 0 V.

To select the upper sideband when using as an upconverter,

connect the IF1 pad to the 90° port of the hybrid and connect

the IF2 pad to the 0° port of the hybrid. To select the lower

sideband, connect the IF1 pad to the 0° port of the hybrid and

connect the IF2 pad to the 90° port of the hybrid. The input is

from the sum port of the hybrid, and the difference port is 50 Ω

terminated.

To select the upper sideband (low-side LO) when using as

downconverter, connect the IF1 pad to the 0° port of the hybrid

and connect the IF2 pad to the 90° port of the hybrid. To select

the lower sideband (high-side LO), connect the IF1 pad to the

90° port of the hybrid and connect the IF2 pad to the 0° port of

the hybrid. The output is from the sum port of the hybrid, and

the difference port is 50 Ω terminated.

HMC525ACHIPS

GND

IF1

IF2

IF1

IF2

GND

90° HYBRID

DC BLOCKING

CAPACITORS

SUPPLY

FOR IF2

BIAS TEE/

DC FEED FOR IF2

SUPPLY

FOR IF1

BIAS TEE/

DC FEED FOR IF1

50Ω

IFx

EXTERNAL

90° HYBRID

Figure 100. Typical Application Circuit

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