DLPC3421 datasheet(52/63 Pages) TI

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10.1.3 DSI Interface Layout

Follow these PCB layout guidelines for the DSI LVDS interface to ensure proper DSI operation.

• Route the differential clock and data lines to match 50-Ω single-ended and 100-Ω differential impedance.

• The length of dp and dn should be matched. If that is not possible, ensure that dp is only slightly longer than

dn (delta delay not to exceed 8-10 ps), especially for the clock-lane. This is to prevent propagation on the

clock lane during the HS to LP transition.

• No thru-hole vias permitted on high-speed traces.

• Create trace routes on top or bottom layers preferably.

• Must have a ground reference plane.

• Avoid power plane transitions in upper or lower layers.

• Avoid using SMD (surface mount device) resistors larger than 0402. If resistors are used in the traces, ensure

that the layer below has a void.

• No thru-hole SMA (SubMiniature version A) connectors.

• Minimize trace length as much as possible.

• Perform signal integrity simulations to ensure board performance.

10.1.4 Unused Pins

To avoid potentially damaging current caused by floating CMOS input-only pins, TI recommends tying unused

controller input pins through a pullup resistor to its associated power supply or a pulldown resistor to ground.

For controller inputs with internal pullup or pulldown resistors, it is unnecessary to add an external pullup or

pulldown unless specifically recommended. Note that internal pullup and pulldown resistors are weak and should

not be expected to drive an external device. The DLPC34xx controller implements very few internal resistors and

are listed in the tables found in the Pin Configuration and Functions section. When external pullup or pulldown

resistors are needed for pins that have weak pullup or pulldown resistors, choose a maximum resistance of 8

kΩ.

Never tie unused output-only pins directly to power or ground. Leave them open.

When possible, TI recommends that unused bidirectional I/O pins are configured to their output state such that

the pin can remain open. If this control is not available and the pins may become an input, then include an

appropriate pullup (or pulldown) resistor.

DLPC3421

DLPS231 – OCTOBER 2021

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DLPC3421 データシート(PDF) 52 Page - Texas Instruments