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STSPIN32G4TR データシート(PDF) 21 Page - STMicroelectronics |
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STSPIN32G4TR データシート(HTML) 21 Page - STMicroelectronics |
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21 / 48 page ![]() 5.2.2 Minimum deadtime The device guarantees a minimum deadtime value of tDT, imposing a delay between the turn-off of an external MOSFET and the turn-on of the complementary one. The deadtime is not added to the one eventually imposed by the MCU, as shown in Figure 15. Figure 15. Deadtime timing (with interlocking enabled) INHx INLx GHSx GLSx tDT tDT tDT tDT tDT tDT tDT The feature is disabled clearing the DTMIN bit (see Table 17) or when the interlocking is disabled (see Section 5.2.1 ). 5.2.3 Sink/source current The output stage of the gate drivers provides a maximum sink/source capability of 1 A. The voltage to current characteristics of the gate driver output stage is described by Figure 26 and Figure 27. When in UVLO condition, the gate drivers keep their outputs low with the maximum current capability available. Figure 16. Low-side gate driver output characteristic in UVLO range Figure 17. High-side gate driver output characteristic in UVLO range STSPIN32G4 Gate drivers DS13630 - Rev 1 page 21/48 |
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