STM32WB10CC datasheet(99/110 Pages) STMICROELECTRONICS

99 / 110 page

DS13259 Rev 2

99/110

STM32WB10CC

Electrical characteristics

102

Table 76. SPI characteristics(1)

Symbol

Parameter

Conditions

Min

Typ

Max

Unit

fSCK

1/tc(SCK)

SPI clock frequency

Master mode



2.0 < VDD < 3.6 V

MHz

Slave receiver mode



2.0 < VDD < 3.6 V

Slave mode transmitter/full duplex



2.7 < VDD < 3.6 V

32(2)

Slave mode transmitter/full duplex



2.0 < VDD < 3.6 V

24(2)

tsu(NSS) NSS setup time

Slave mode, SPI prescaler = 2

4 x TPCLK

th(NSS) NSS hold time

Slave mode, SPI prescaler = 2

2 x TPCLK

tw(SCKH)

tw(SCKL)

SCK high and low time

Master mode

TPCLK - 1.5

TPCLK

TPCLK + 1

tsu(MI)

Data input setup time

Master mode

6.5

tsu(SI)

Slave mode

1.5

th(MI)

Data input hold time

Master mode

4.5

th(SI)

Slave mode

1.5

ta(SO)

Data output access time

Slave mode

9.0

tdis(SO) Data output disable time

9.0

tv(SO)

Data output valid time

Slave mode 2.7 < VDD < 3.6 V

10.5

13.0

Slave mode 2.0 < VDD < 3.6 V

10.5

20.5

tv(MO)

Master mode (after enable edge)

2.5

3.0

th(SO)

Data output hold time

Slave mode (after enable edge)

8.0

th(MO)

Master mode (after enable edge)

1.0

1. Evaluated by characterization, not tested in production.

2. Maximum frequency in Slave transmitter mode is determined by the sum of tv(SO) and tsu(MI), which has to fit into SCK low

or high phase preceding the SCK sampling edge. This value can be achieved when the SPI communicates with a master

having tsu(MI) = 0 while Duty(SCK) = 50 %.

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