Data Sheet

AD9986

SPECIFICATIONS

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Rev. 0 | 8 of 37

INPUT DATA RATES SPECIFICATIONS

Table 8.

Parameter1 2

Test Conditions/Comments

Min

Typ

Max

Unit

MAXIMUM DATA RATE PER NUMBER OF ACTIVE

DAC OUTPUTS

Single DAC, FDUC and CDUC bypassed (1× interpolation), 16-bit resolution;

limited by the maximum DAC clock rate

12000

MSPS

Quad DAC, FDUC and CDUC bypassed (1× interpolation), 12-bit resolution;

limited by the maximum JESD204C link throughput (M = 4, L = 8)

4000

MSPS

MAXIMUM COMPLEX (I/Q) DATA RATE PER

NUMBER OF ACTIVE INPUT DATA CHANNELS

1 channel: FDUC bypassed, 1 CDUC enabled, 12-bit or 16-bit resolution;

limited by the maximum CDUC NCO clock rate

6000

MSPS

2 channels: FDUC bypassed, 2 CDUCs enabled, 12-bit resolution; limited by

the maximum JESD204C link throughput (M = 4, L = 8)

4000

MSPS

4 channels: FDUC bypassed, 4 CDUCs enabled, 12-bit resolution; limited by

the maximum JESD204C link throughput (M = 8, L = 8)

2000

MSPS

8 channels: 8 FDUCs enabled, one or more CDUC enabled, 12-bit or 16-bit

resolution; limited by the maximum FDUC NCO clock rate divided by the

minimum 2x interpolation rate required to enable the FDUC

750

MSPS

parameters.

the Q path. Similarly, the decimation stages inside the Rx datapath use filters with a total complex filter bandwidth of 81.4%. Therefore, the maximum allowed instantaneous

complex signal bandwidth (iBW) per channel is calculated as iBW = [Complex I/Q Data Rate per Channel] × [Total Complex Filter Bandwidth].