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VSC8540RT データシート(PDF) 30 Page - Microchip Technology

部品番号 VSC8540RT
部品情報  Radiation-Tolerant Single Port Fast Ethernet Copper PHY with RGMII/MII/RMII Interfaces
PDF  87 Pages
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メーカー  MICROCHIP [Microchip Technology]
ホームページ  http://www.microchip.com
Logo MICROCHIP - Microchip Technology

VSC8540RT データシート(HTML) 30 Page - Microchip Technology

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VSC8540RT
DS60001603E-page 30
2022 Microchip Technology Inc. and its subsidiaries
5.11.2
BASIC SERIAL LED MODE
The VSC8540RT device can be configured so that access to all its LED signals is available through two pins. This option
is enabled by setting LED0 to serial LED mode in register 29, bits 3:0 to 0xD. When serial LED mode is enabled, the
LED0 pin becomes the serial data pin, and the LED1 pin becomes the serial clock pin. The serial LED mode clocks the
LED status bits on the rising edge of the serial clock.
The LED behavior settings can also be used in serial LED mode. The LED combine and LED blink or pulse-stretch set-
ting of LED0 is used to control the behavior of each bit of the serial LED stream. To configure LED behavior, set device
register 30.
The following table shows the serial output bitstream of each LED signal.
5
Reserved
Reserved.
6
Link10/100/Activity
1: No link in 10BASE-T or 100BASE-TX.
0: Valid 10BASE-T or 100BASE-TX link.
Blink or pulse-stretch = Valid 10BASE-T or 100BASE-TX link with activity present.
7
Reserved
Reserved.
8
Duplex/Collision
1: Link established in half-duplex mode, or no link established.
0: Link established in full-duplex mode.
Blink or pulse-stretch = Link established in half-duplex mode but collisions are pres-
ent.
9
Collision
1: No collision detected.
Blink or pulse-stretch = Collision detected.
10
Activity
1: No activity present.
Blink or pulse-stretch = Activity present (becomes TX activity present when register
bit 30.14 is set to 1).
11
Reserved
Reserved.
12
Autonegotiation Fault 1: No auto-negotiation fault present.
0: Auto-negotiation fault occurred.
13
Serial Mode
Serial stream. See Section 5.11.2, "Basic Serial LED Mode". Only relevant on PHY
port 0. Reserved in others.
14
Force LED Off
1: De-asserts the LED.
15
Force LED On
0: Asserts the LED1.
1. Setting this mode suppresses LED blinking after reset.
TABLE 5-15:
LED SERIAL BITSTREAM ORDER
Output
Link/activity
1
Reserved
2
Link100/activity
3
Link10/activity
4
Reserved
5
Duplex/collision
6
Collision
7
Activity
8
Reserved
9
Tx activity
10
Rx activity
11
Autonegotiation fault 12
TABLE 5-14:
LED MODE AND FUNCTION SUMMARY (CONTINUED)
Mode
Function Name
LED State and Description



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