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8V97052 データシート(PDF) 21 Page - Renesas Technology Corp

部品番号 8V97052
部品情報  High Resolution Wideband RF Synthesizer / PLL
PDF  48 Pages
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メーカー  RENESAS [Renesas Technology Corp]
ホームページ  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

8V97052 データシート(HTML) 21 Page - Renesas Technology Corp

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R31DS0022EU0110 Rev.1.1
Page 21
May 20, 2021
8V97052 Datasheet
Table 17. Register 1: 12 Last Bits Modulus Value (MOD). Function Description[1]
1. This table is used along with Register 5 MOD value in order to complete the 32 bits of MOD.
Name
Description
Factory Defaults
Function
Register 1 MOD
(FDiv[32:21])
Register 5 MOD
(FDiv[20:1])
Register 1 MOD
(FDiv[32:21])
Register 5 MOD
(FDiv[20:1])
Value
Mod[32:1]
MODULUS
VALUE (MOD)
0000 0000 0000
0000 0000 0000
0000 0010
0000 0000 0000
0000 0000 0000
0000 0000
Not
Allowed
0000 0000 0000
0000 0001
Not
Allowed
0000 0000 0000
0000 0010
2
1111 1111 1111
1111 1111
(2^20) – 1
=
1,048,575
0000 0000 0001
0000 0000 0000
0000 0000
2^20 =
1,048,576
1111 1111 1111
1111 1111
(2^21) – 1
1111 1111 1111
0000 0000 0000
0000 0000
2^20*(2^12
–1)
1111 1111 1111
1111 1111
2^32 – 1
Table 18. Register 1: 3-Bit Control Bits. Function Description[1]
1. The user has to set CB[3:1] to 001 in order to write to Register 1.
Name
Description
Function
CB[3:1]
Control bits
001 = Register 1 is programmed



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