L9396 datasheet(74/109 Pages) STMICROELECTRONICS

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System functional safety implementations

L9396

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DS12539 Rev 6

arrive before T_Req_TimeOut has elapsed, a WD1_RESET will be generated and the flag

WD_RST_TO_Req will be set.

In case the WD_TO_RST_EN is not set:

The error event counter, WD_CNT, will be decreased and the device starts to wait again for

the answer with the same timing procedure.

L9396 starts the WD evolution state machine in IDLE mode in which it is waiting for the first

seed request from microcontroller through SPI. In this way the starting period is completely

under the control of the microcontroller allowing to safely conclude boot procedure before

starting the WD seed request/answer mechanism. During this period WD configuration

registers can be programmed. The first seed request acts when a WD state machine start.

After this event the WD will never stop and WD configuration registers become read only

and cannot be changed. The only exception is about the T_Valid_Answ_Start and the

T_Valid_Req_Start. In case one of these parameters is changed, the timing window restarts

and WD_CNT will be decremented by a WD_cnt_bad_step number of steps.

WD_CNT is a 4-bit counter used to collect good and bad events provided by the

microcontroller.

A good event is a Request coming in the correct timing window if a Request is expected in

the FSM, or a correct Answer coming in the correct timing window when expected.

A bad event is a wrong Answer or an answer in a wrong timing window, a Request in a

wrong timing window (in bidirectional mode), a timeout event, a Request when an Answer is

expected or an Answer when a Read is expected.

Figure 16. Timing State evolution depending on WD_TO_RST_EN and

WD_REQ_CHECK_EN

Note:

Also in mono-directional mode the FSM is waiting a Query after an Answer in order to send

a new seed to µC but in this configuration the Timing check on Queries is not performed and

WD_CNT is not decremented in case of request timing error except for Timeout.

IDLE

WAIT

ANSWER

WAIT

REQ

IDLE

WAIT

ANSWER

WAIT

REQ

IDLE

WAIT

ANSWER

IDLE

WAIT

ANSWER

GADG2401171437PS

WD_REQ_CHECK_EN = 1

WD_TO_RST_EN = 1

WD_REQ_CHECK_EN = 1

WD_TO_RST_EN = 0

WD_REQ_CHECK_EN = 0

WD_TO_RST_EN = 1

WD_REQ_CHECK_EN = 0

WD_TO_RST_EN = 0

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