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LT8686SJVPBF データシート(PDF) 19 Page - Analog Devices |
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LT8686SJVPBF データシート(HTML) 19 Page - Analog Devices |
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19 / 26 page ![]() LT8686S 19 Rev. 0 For more information www.analog.com However, not all ceramic capacitors are the same. Many of the higher value capacitors use dielectrics with high temperature and voltage coefficients. Y5V and Z5U types lose a large fraction of their capacitance with applied volt- age and at temperature extremes. Because loop stability, transient response, ripple and EMI depend on the value of the input and output capacitors, it is best to use X5R (max 85°C), X7R (max 125°C) or X8R (max 150°C) capacitors depending on the operating temperature range. Electrolytic capacitors are also an option. The ESRs of most aluminum electrolytic capacitors are too large to deliver low output ripple. Tantalum, as well as newer, lower ESR organic electrolytic capacitors intended for power supply use are suitable. Choose a capacitor with a low enough ESR for the required output ripple. Because the volume of the capacitor determines its ESR, both the size and value will be larger than a ceramic capacitor that would give similar ripple performance. The Typical Applications section provides a reasonable starting point for output capacitor values. Careful evalua- tion of each application must be made to ensure adequate design margin. BOOST CAPACITOR SELECTION Connecting a capacitor between each channel’s BST and SW pins creates an internal approximately 3.4V supply used to drive the internal power devices. For most applica- tions, choosing a 0.1μF ceramic capacitor for this function works well. Although the SW and BST pins of combined channels are connected at the board level to drive a single inductor, for robust operation, each of the combined channels must have its own boost capacitor connected between their respective BST and SW pins. OUTPUT VOLTAGE TRACKING AND SOFT-START The LT8686S’s programmable channel soft-start fea- ture, which controls the output voltage ramp time during startup, combined with channel power good (PG) and enable (EN) functions, supports flexible startup sequenc- ing and control. In addition, the soft-start feature can be used to reduce input surge current and prevent output voltage overshoot. To program the output voltage soft- start time, connect a capacitor between the channel’s TRK/SS pin and ground according to Equation 16. tSS = CSS •0.8V 2µA (16) where 2µA is the TRK/SS pull-up current and CSS is the value of the capacitor in Farads. The channel TRK/SSx pins are pulled down through approximately 300k, which will discharge the external soft-start capacitor when the part is shut down or during certain fault conditions. For output voltage tracking, the channel TRK/SS pin can be driven by an external voltage source. More specifically, when driven with a voltage between 0V and 0.8V, the TRK/ SS pin will override the internal 0.8V reference input to the error amplifier thus regulating the FB voltage to that present on the TRK/SS pin. When TRK/SS is above 0.8V, tracking is disabled, and the feedback voltage will regulate to the internal reference voltage. When combining channels, slave channel TRK/SS pins should be open. POWER GOOD COMPARATORS Each LT8686S channel has a power good comparator with an open drain output pin, PGx. Each PG pin is pulled low when the corresponding feedback voltage is either above or below its reference voltage by more than 7.5%. See the Electrical Characteristics table for more information on each channel’s power good thresholds. All PG pins will be pulled low when the part is shut down. Individual channel PG pins will be pulled low when their corresponding EN pin is low. When combining channels, only the master channel PG pins are valid. Slave PG pins should be open. APPLICATIONS INFORMATION |
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