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STM32W108CB データシート(PDF) 66 Page - STMicroelectronics

部品番号 STM32W108CB
部品情報  High-performance, IEEE 802.15.4 wireless system-on-chip with up to 256 Kbytes of embedded Flash memory
PDF  278 Pages
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メーカー  STMICROELECTRONICS [STMicroelectronics]
ホームページ  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

STM32W108CB データシート(HTML) 66 Page - STMicroelectronics

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System modules
STM32W108HB STM32W108CC STM32W108CB STM32W108CZ
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Doc ID 16252 Rev 14
Sleep timer compare B low register (SLPTMR_CMPBL)
Address:
0x4000 6024
Reset value:
0x0000 FFFF
Reserved, must be kept at reset value
CMPBL[15:0]: Sleep timer compare B low value
Sleep timer interrupt source register (SLPTMR_ISR)
Address:
0x4000 A014
Reset value:
0x0000 0000
Reserved, must be kept at reset value
CMPB: Sleep timer compare B
CMPA: Sleep timer compare A
WRAP: Sleep timer wrap
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
Reserved
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
CMPBL[15:0]
rw
rw
rw
rw
rw
rw
rw
rw
rw
rw
rw
rw
rw
rw
rw
rw
Bits [31:16]
Bits [15:0]
Writing to this register puts the value in the hold register until a write to the SLPTMR_CMPBH
register. The value can only be changed when the sleep timer is enabled (EN bit set to ‘0’ in
the SLPTMR_CR register) is set to ‘0’. If the value is changed when the sleep timer is
enabled (EN bit set to ‘1’ in the SLPTMR_CR register), a spurious interrupt may be
generated. Therefore it is recommended to disable interrupts before changing this register.
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
Reserved
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
Reserved
CMPB
CMPA
WRAP
rw
rw
rw
Bits [31:3]
Bit 2
Bit 1
Bit 0



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