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ISO808 データシート(PDF) 25 Page - STMicroelectronics |
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ISO808 データシート(HTML) 25 Page - STMicroelectronics |
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25 / 38 page ![]() 9 Reverse polarity on VDD The reverse polarity on VDD can be implemented on the board by placing a diode between the GNDDD pin and GND digital ground. The diode must be chosen by taking into account VRRM > |VDD| and its power dissipation capability: PD≥IDD×VF (4) Note: In normal operation (no reverse polarity), due to the diode, there is a voltage drop (ΔV = VF@(Idd)) between GNDDD of the device and digital ground of the system. In order to guarantee proper triggering of the input signal, ΔV(max.) must result lower than VIH(MIN). Figure 26. VDD reverse polarity protection Note: Input(i) is intended as any input pin on logic side. ISO808, ISO808-1 Reverse polarity on VDD DS14169 - Rev 1 page 25/38 |
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