Nexperia

74LVC2G08

Dual 2-input AND gate

3. Ordering information

Table 1. Ordering information

Package

Type number

Temperature range Name

Description

Version

74LVC2G08DP

-40 °C to +125 °C

TSSOP8 plastic thin shrink small outline package; 8 leads;

body width 3 mm; lead length 0.5 mm

SOT505-2

74LVC2G08DC

-40 °C to +125 °C

VSSOP8 plastic very thin shrink small outline package; 8 leads;

body width 2.3 mm

SOT765-1

74LVC2G08GT

-40 °C to +125 °C

XSON8

plastic extremely thin small outline package; no leads;

8 terminals; body 1 × 1.95 × 0.5 mm

SOT833-1

74LVC2G08GF

-40 °C to +125 °C

XSON8

extremely thin small outline package; no leads;

8 terminals; body 1.35 × 1 × 0.5 mm

SOT1089

74LVC2G08GN

-40 °C to +125 °C

XSON8

extremely thin small outline package; no leads;

8 terminals; body 1.2 × 1.0 × 0.35 mm

SOT1116

74LVC2G08GS

-40 °C to +125 °C

XSON8

extremely thin small outline package; no leads;

8 terminals; body 1.35 × 1.0 × 0.35 mm

SOT1203

74LVC2G08GX

-40 °C to +125 °C

X2SON8 plastic thermal enhanced extremely thin

small outline package; no leads; 8 terminals;

body 1.35 × 0.8 × 0.32 mm

SOT1233-2

4. Marking

Table 2. Marking codes

Type number

Marking code[1]

74LVC2G08DP

V08

74LVC2G08DC

V08

74LVC2G08GT

V08

74LVC2G08GF

VE

74LVC2G08GN

VE

74LVC2G08GS

VE

74LVC2G08GX

VE

[1] The pin 1 indicator is located on the lower left corner of the device, below the marking code.

5. Functional diagram

001aah788

1A

1B

1Y

2A

2B

2Y

Fig. 1. Logic symbol

001aah789

&

&

Fig. 2. IEC logic symbol

mna221

A

B

Y

Fig. 3. Logic diagram (one gate)

74LVC2G08

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© Nexperia B.V. 2023. All rights reserved

Product data sheet

Rev. 18 — 23 January 2023

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