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74VHCT595 データシート(PDF) 10 Page - Nexperia B.V. All rights reserved

部品番号 74VHCT595
部品情報  8-bit serial-in/serial-out or parallel-out shift register with output latches
PDF  20 Pages
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メーカー  NEXPERIA [Nexperia B.V. All rights reserved]
ホームページ  https://www.nexperia.com/
Logo NEXPERIA - Nexperia B.V. All rights reserved

74VHCT595 データシート(HTML) 10 Page - Nexperia B.V. All rights reserved

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Nexperia
74VHC595; 74VHCT595
8-bit serial-in/serial-out or parallel-out shift register with output latches
25 °C
-40 °C to +85 °C -40 °C to +125 °C
Symbol Parameter Conditions
Min Typ[1] Max
Min
Max
Min
Max
Unit
74VHCT595; VCC = 4.5 V to 5.5 V
SHCP to Q7S; see Fig. 8
[2]
CL = 15 pF
-
3.8
8.2
1.0
9.0
1.0
10.0
ns
CL = 50 pF
-
5.2
10.0
1.0
11.0
1.0
12.0
ns
STCP to Qn; see Fig. 9
[2]
CL = 15 pF
-
4.0
7.4
1.0
8.5
1.0
9.5
ns
CL = 50 pF
-
5.3
9.0
1.0
10.5
1.0
11.5
ns
MR to Q7S; see Fig. 11
[3]
CL = 15 pF
-
4.6
8.2
1.0
9.5
1.0
10.5
ns
tpd
propagation
delay
CL = 50 pF
-
5.8
10.5
1.0
11.5
1.0
12.5
ns
OE to Qn; see Fig. 12
[4]
CL = 15 pF
-
4.8
9.0
1.0
11.0
1.0
12.0
ns
ten
enable time
CL = 50 pF
-
6.2
11.6
1.0
13.0
1.0
14.5
ns
OE to Qn; see Fig. 12
[5]
CL = 15 pF
-
3.6
6.9
1.0
8.0
1.0
9.0
ns
tdis
disable time
CL = 50 pF
-
5.8
10.3
1.0
11.0
1.0
12.0
ns
fmax
maximum
frequency
SHCP and STCP;
see Fig. 8 and Fig. 9
130
170
-
110
-
90
-
MHz
SHCP HIGH or LOW;
see Fig. 8
5.0
-
-
5.0
-
5.0
-
ns
STCP HIGH or LOW;
see Fig. 9
5.0
-
-
5.0
-
5.0
-
ns
tW
pulse width
MR LOW; see Fig. 11
5.0
-
-
5.0
-
5.0
-
ns
DS to SHCP; see Fig. 10
3.0
-
-
3.0
-
3.0
-
ns
tsu
set-up time
SHCP to STCP; see Fig. 9
5.0
-
-
5.0
-
5.0
-
ns
th
hold time
DS to SHCP; see Fig. 10
2.0
-
-
2.0
-
2.0
-
ns
trec
recovery
time
MR to SHCP; see Fig. 11
3.0
-
-
3.0
-
3.0
-
ns
CPD
power
dissipation
capacitance
fi = 1 MHz;
VI = GND to VCC;
all 9 outputs switching
[6]
-
190
-
-
-
-
-
pF
[1] Typical values are measured at nominal supply voltage.
[2] tpd is the same as tPHL and tPLH.
[3] tpd is the same as tPHL only.
[4] ten is the same as tPZL and tPZH.
[5] tdis is the same as tPLZ and tPHZ.
[6] CPD is used to determine the dynamic power dissipation (PD in μW).
PD = CPD x VCC 2 x fi + Σ(CL x VCC 2 x fo) where:
fi = input frequency in MHz;
fo = output frequency in MHz;
Σ(CL x VCC 2 x fo) = sum of outputs;
CL = output load capacitance in pF;
VCC = supply voltage in V.
74VHC_VHCT595
All information provided in this document is subject to legal disclaimers.
© Nexperia B.V. 2020. All rights reserved
Product data sheet
Rev. 3 — 25 June 2020
10 / 20



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