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UPD17704 データシート(PDF) 54 Page - Renesas Technology Corp |
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UPD17704 データシート(HTML) 54 Page - Renesas Technology Corp |
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54 / 358 page ![]() µPD17704, 17705, 17707, 17708, 17709 52 5.7 General Register Pointer (RP) 5.7.1 Configuration of General Register Pointer Figure 5-7 shows the configuration of the general register pointer. As shown in the figure, the general register pointer consists of 7 bits including 4 bits of system register address 7DH (RPH) and the high-order 3 bits of address 7EH (RPL). Figure 5-7. Configuration of General Register Pointer 7DH RPH 0 0 0 Retained 7EH RPL 0 0 0 Retained b3 M S B b2 b1 b0 b3 b2 b1 L S B b0 B C D General register pointer (RP) Address Name Symbol Bit Data Clock stop Power-ON reset WDT&SP reset CE reset |
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