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UPD17704 データシート(PDF) 100 Page - Renesas Technology Corp

部品番号 UPD17704
部品情報  MOS INTEGRATED CIRCUIT
PDF  358 Pages
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メーカー  RENESAS [Renesas Technology Corp]
ホームページ  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

UPD17704 データシート(HTML) 100 Page - Renesas Technology Corp

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µPD17704, 17705, 17707, 17708, 17709
98
Table 11-1. Relationships between Port (Pin) and Port Register (3/3)
Port
Pin
Data Setting Method
No.
Symbol
I/O
Port register (data memory)
Bank
Address
Symbol
Bit symbol
(reserved word)
Port 3A
6
P3A3
I/O
BANK3
70H
P3A
b3
P3A3
7
P3A2
(group I/O)
b2
P3A2
8
P3A1
b1
P3A1
9
P3A0
b0
P3A0
Port 3B
10
P3B3
I/O
71H
P3B
b3
P3B3
11
P3B2
(group I/O)
b2
P3B2
12
P3B1
b1
P3B1
13
P3B0
b0
P3B0
Port 3C
47
P3C3
I/O
72H
P3C
b3
P3C3
48
P3C2
(group I/O)
b2
P3C2
49
P3C1
b1
P3C1
50
P3C0
b0
P3C0
Port 3D
51
P3D3
I/O
73H
P3D
b3
P3D3
52
P3D2
(group I/O)
b2
P3D2
53
P3D1
b1
P3D1
54
P3D0
b0
P3D0
–
No pin
–
BANK4
70H-73H
–
Fixed to “0”
|
BANK15Note
Note
The
µPD17704 and 17705 do not have BANKs 6 through 14.
µPD17707 and 17708 do not have BANKs 10 through 14.



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