2000 Feb 11

24

Philips Semiconductors

Product specification

34

× 128 pixel matrix driver

PCF8531

13 AC CHARACTERISTICS

Notes

3. All timing values are valid within the operating supply voltage and ambient temperature range and are referenced to

SYMBOL

PARAMETER

CONDITIONS

MIN.

TYP.

MAX.

UNIT

LCD frame frequency (internal clock)

66

135

Hz

oscillator frequency (not available at any pin)

20

34

65

kHz

external clock frequency

20

−

65

kHz

reset LOW pulse width

note 2

300

−−

ns

reset LOW pulse set-up time after Power-on

−−

30

µs

Serial-bus interface; note 3

SCL clock frequency

0

−

400

kHz

SCL clock LOW period

1.3

−−µs

SCL clock HIGH period

0.6

−−µs

data set-up time

100

−−

ns

data hold time

0

−

0.9

µs

SCL, SDA rise time

note 4

−

300

ns

SCL, SDA fall time

note 4

−

300

ns

capacitive load represented by each bus line

−−

400

pF

set-up time for a repeated START condition

0.6

−−µs

start condition hold time

0.6

−−µs

set-up time for STOP condition

0.6

−−µs

tolerable spike width on bus

−−

50

ns

bus free time between a STOP and START

condition

1.3

−−µs

handbook, full pagewidth

MGS476

tW(RESL)

tSU;RESL

VIL

VDD

RES

Fig.16 Reset timing.