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MFS5600AMBAFES データシート(PDF) 79 Page - NXP Semiconductors |
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MFS5600AMBAFES データシート(HTML) 79 Page - NXP Semiconductors |
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79 / 118 page  NXP Semiconductors FS5600 Automotive buck regulator and controller with voltage monitors and watchdog timer Bit Symbol Description 4b'1111 — Counter Value = 15. Reset Condition — POR Table 64. WATCHDOG_CTRL1 register description...continued 18.1.10 NOT_WATCHDOG_CTRL1 register Bit Symbol Description 15 to 14 NOT_WD_ERR_LIMIT[1:0] Watchdog error counter limit. 2b'00 — See WD_ERR_LIMIT[1:0] in WATCHDOG_CTRL1 register. 2b'01 — See WD_ERR_LIMIT[1:0] in WATCHDOG_CTRL1 register. 2b'10 — See WD_ERR_LIMIT[1:0] in WATCHDOG_CTRL1 register. 2b'11 — See WD_ERR_LIMIT[1:0] in WATCHDOG_CTRL1 register. Reset Condition — POR 12 to 11 NOT_WD_RFR_LIMIT[1:0] Watchdog refresh counter limit. 2b'00 — See WD_RFR_LIIMIT[1:0] in WATCHDOG_CTRL1 register. 2b'01 — See WD_RFR_LIIMIT[1:0] in WATCHDOG_CTRL1 register. 2b'10 — See WD_RFR_LIIMIT[1:0] in WATCHDOG_CTRL1 register. 2b'11 — See WD_RFR_LIIMIT[1:0] in WATCHDOG_CTRL1 register. Reset Condition — POR 9 to 8 NOT_WD_FAIL_IMPACT[1:0] Watchdog fail impact. 2b'00 — See WD_FAIL_IMPACT[1:0] in WATCHDOG_CTRL1 register. 2b'01 — See WD_FAIL_IMPACT[1:0] in WATCHDOG_CTRL1 register. 2b'10 — See WD_FAIL_IMPACT[1:0] in WATCHDOG_CTRL1 register. 2b'11 — See WD_FAIL_IMPACT[1:0] in WATCHDOG_CTRL1 register. Reset Condition — POR Table 65. NOT_WATCHDOG_CTRL1 register description 18.1.11 WATCHDOG_CTRL2 register Bit Symbol Description 15 to 12 WD_WINDOW[3:0] Watchdog window duration, Applied only when WD_WD_WINDOW[3:0] = NOT(NOT_WD_ WINDOW[3:0]) 4b'0000 — Infinite. 4b'0001 — 1 ms. 4b'0010 — 2 ms. 4b'0011 — 3 ms. 4b'0100 — 4 ms. 4b'0101 — 6 ms. 4b'0110 — 8 ms. 4b'0111 — 12 ms. 4b'1000 — 16 ms. 4b'1001 — 24 ms. 4b'1010 — 32 ms. Table 66. WATCHDOG_CTRL2 register description FS5600 All information provided in this document is subject to legal disclaimers. © 2024 NXP B.V. All rights reserved. Product data sheet Rev. 4 — 29 April 2024 79 / 118 |
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