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M65KA512AB データシート(PDF) 17 Page - STMicroelectronics

部品番号 M65KA512AB
部品情報  512Mbit (4 Banks x 8M x 16), 133 MHz Clock Rate, Bare Die, 1.8 V Supply, Low Power SDRAM
PDF  55 Pages
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メーカー  STMICROELECTRONICS [STMicroelectronics]
ホームページ  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

M65KA512AB データシート(HTML) 17 Page - STMicroelectronics

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M65KA512AB
Commands
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4.4
Write command
The Write command is used to switch the Low-Power SDRAM to Burst Write mode (see
Section 3.3: Burst Write mode).
4.5
Read command
The Read command is used to switch the Low-Power SDRAM to Burst Read mode (see
Section 3.2: Burst Read).
4.6
Precharge command
The Precharge command is used to close the open row in a particular bank or the open row
in all banks. When the precharge command is issued with address A10 driven High, all
banks will be precharged. If A10 is driven Low, the open row in a particular bank will be
precharged. The bank(s) will be available when the minimum tRP time has elapsed after the
precharge command has been issued.
4.7
Auto Precharge command
The Auto Precharge command is used to close the open row in a specific bank after a Read
or Write operation. A10 is High, VIH, when a Read (or Write) command is issued.
4.8
Burst Terminate command
The Burst Terminate command is used to terminate a Burst operation. A Burst operation can
be interrupted by using the Precharge command (see Section 4.6: Precharge command for
details), or by issuing the Burst Terminate command. Issuing the Burst Terminate command
during a Burst Read or Write cycle will terminate the burst while leaving the bank open.
4.9
Data Mask command
The Data Mask command is used to mask Read or Write data.A Data Mask command
issued during a Read operation will disable the data outputs, switching them to the high
impedance state after a delay of two clock cycles. A Data Mask command issued during a
Write operation will disable the data inputs with no delay.
4.10
Clock Suspend command
The Clock Suspend command is used to interrupt the internal clock of the LPSDRAM. The
command is controlled by the Clock Enable input, KE, which is kept High, VIH, in normal
access mode.The Clock Suspend command is issued by driving KE Low,VIL, thus freezing
the internal clock, and extending data Read and Write operations.



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