DAC1054 datasheet(8/14 Pages) NSC

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Block Diagram

TLH11437 – 15

Pin Description

VOUT1(2)

The voltage output connections of the

VOUT2(23)

four DACS These provide output

VOUT3(17)

voltages in the range 03V – 28V

VOUT4(13)

VREFOUT(21)

The internal voltage reference output

The output of the reference is 265V

VBIAS1(3)

The non-inverting inputs of the 4 output

VBIAS2(24)

amplifiers These pins set the virtual

VBIAS3(16)

ground voltage for the respective DACs

VBIAS4(15)

The allowed range is 03V – 14V

AGND(20)

The analog and digital ground pins

DGND(5)

DVCC(4 6)

The digital and analog power supply

AVCC(19)

pins The power supply range of the

DAC1054 is 45V – 55V To guarantee

accuracy it is required that the AVCC

and DVCC pins be bypassed separately

with bypass capacitors of 10 mF

tantalum in parallel with 01 mF ceramic

AU(11)

When this pin is taken low all DAC outputs

will be asynchronously updated CS must

be held high during the update AU must be

held high during Read back

VREF1(1)

The voltage reference inputs for the four

VREF2(22)

DACs The allowed range is 0V – 275V

VREF3(18)

VREF4(14)

CS(9)

The Chip Select control input This input is

active low

CLK(8)

The external clock input pin

DI(10)

The serial data input The data is clocked in

MSB first Preceding the data byte are 4 or

6 bits of instructions The read back

command requires 7 bits of instructions

DO(7)

The serial data output The data can be

clocked out either MSB or LSB first and on

either the positive or negative edge of the

clock

INT(12)

The power interrupt output On an

interruption of the digital power supply this

pin goes low Since this pin has an open

drain output a 10 kX pull-up resistor must

be connected to the supply

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