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STW5098BBLR データシート(PDF) 47 Page - STMicroelectronics

部品番号 STW5098BBLR
部品情報  Dual low power asynchronous stereo audio Codec with integrated power amplifiers
PDF  85 Pages
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メーカー  STMICROELECTRONICS [STMicroelectronics]
ホームページ  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

STW5098BBLR データシート(HTML) 47 Page - STMicroelectronics

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STw5098
Control registers
47/85
4VLSHEV
1
0
VLSH bit has changed
VLSH bit has not changed
0
3
PUSHBEV
1
0
Headset Button Status has changed
Headset Button Status has not changed
0
2
HSDETEV
1
0
Headset Connector Status has changed
Headset Connector Status has not changed
0
1
OVFEV
1
0
An Audio Data overflow has occurred in DSP
No Audio Data overflow has occurred in DSP
0
0POREV
1
0
Device was reset by power-on-reset
Device was not reset by power-on-reset
0
Note: content of bits 4 to 0 in CR32 is cleared after reading, while it is left unchanged if accessed for writing.
*Bits 7 to 5 represent the status when the Control register is read, not when the event occurred.
Table 26.
CR32 description (continued)
Bits
Name
Read
only
CR32 description
Def.
Table 27.
CR33 description
Bits
Name
Val.
CR33 description
Def.
5
SPIOHIZ
1
0
SPI control interface out pin is set to high impedance state when
inactive
SPI control interface out pin is set to zero when inactive
0
4-3
SPIOSEL(1:0)
00
01
10
11
Out pin selection for SPI control interface
No output. Control registers cannot be read in SPI mode
SPI output sent to IRQ pin
SPI output sent to DA_OCK pin
SPI output sent to AD_OCK pin
00
2
IRQCMOS
1
0
IRQ interrupt request pin is set to CMOS (active low)
IRQ interrupt request pin is set to pull down
0
1OVFDA
1
0
An overflow (saturation) occurred in DA path
No overflow occurred in DA channel
0
0
OVFAD
1
0
An overflow (saturation) occurred in AD path
No overflow occurred in AD channel
0
Note: content of bits 1 to 0 in CR33 is cleared after reading, while it is left unchanged if accessed for writing.



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