ADC12L034 datasheet(9/35 Pages) NSC

部品番号	ADC12L034

部品情報	3.3V Self-Calibrating 12-Bit Plus Sign Serial I/O A/D Converters with MUX and Sample/Hold

PDF	35 Pages

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メーカー	NSC [National Semiconductor (TI)]

ホームページ	http://www.national.com

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AC Electrical Characteristics (Continued)

Note 16: Channel leakage current is measured after the channel selection.

Note 17: Timing specifications are tested at the TTL logic levels, VIL = 0.4V for a falling edge and VIH = 2.4V for a rising edge. TRI-STATE output voltage is forced

to 1.4V.

Note 18: The ADC12L030 family’s self-calibration technique ensures linearity and offset errors as specified, but noise inherent in the self-calibration process will

result in a maximum repeatability uncertainty of 0.2 LSB.

Note 19: If SCLK and CCLK are driven from the same clock source, then tA is 6, 10, 18 or 34 clock periods minimum and maximum.

Note 20: The “12-Bit Conversion of Offset” and “12-Bit Conversion of Full-Scale” modes are intended to test the functionality of the device. Therefore, the output

data from these modes are not an indication of the accuracy of a conversion result.

01183007

FIGURE 1. Transfer Characteristic

01183008

FIGURE 2. Simplified Error Curve vs. Output Code without Auto-Calibration or Auto-Zero Cycles

ADC12L034 データシート(PDF) 9 Page - National Semiconductor (TI)

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