STAMP0 datasheet(46/62 Pages) STMICROELECTRONICS

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I²C registers

STAMP0

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DocID028639 Rev 1

5.2.40

Interrupt 4 configuration register (reg. 0x27)

AUTOPLL

PLLBYP

Bit

R/W

RST

Name

Description

R/W

AUTOPLL

0: PLL is programmed correctly

1: PLL is not programmed correctly

R/W

PLLBYP

0: PLL locked

1: PLL not locked

5.2.41

Interrupt masking 1 configuration register (reg. 0x28)

MRMS8s

MRMS7s

MRMS6s

MRMS5s

MRMS4s

MRMS3s

MRMS2s

MRMS1s

Bit

R/W

RST

Name

Description

R/W

MRMS8s

0: RMS upper limit interrupt on channel 8 is not masked

1: RMS upper limit interrupt on channel 8 is masked

R/W

MRMS7s

0: RMS upper limit interrupt on channel 7 is not masked

1: RMS upper limit interrupt on channel 7 is masked

R/W

MRMS6s

0: RMS upper limit interrupt on channel 6 is not masked

1: RMS upper limit interrupt on channel 6 is masked

R/W

MRMS5s

0: RMS upper limit interrupt on channel 5 is not masked

1: RMS upper limit interrupt on channel 5 is masked

R/W

MRMS4s

0: RMS upper limit interrupt on channel 4 is not masked

1: RMS upper limit interrupt on channel 4 is masked

R/W

MRMS3s

0: RMS upper limit interrupt on channel 3 is not masked

1: RMS upper limit interrupt on channel 3 is masked

R/W

MRMS2s

0: RMS upper limit interrupt on channel 2 is not masked

1: RMS upper limit interrupt on channel 2 is masked

R/W

MRMS1s

0: RMS upper limit interrupt on channel 1 is not masked

1: RMS upper limit interrupt on channel 1 is masked

Obsolete

Product(s)

- Obsolete

Product(s)

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