データシートサーチシステム
  Japanese  ▼
ALLDATASHEET.JP

X  

FS2101 データシート(PDF) 11 Page - Agilent(Hewlett-Packard)

部品番号 FS2101
部品情報  LOCAL BUS
PDF  48 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
メーカー  HP [Agilent(Hewlett-Packard)]
ホームページ  http://www.home.agilent.com
Logo HP - Agilent(Hewlett-Packard)

FS2101 データシート(HTML) 11 Page - Agilent(Hewlett-Packard)

Back Button FS2101 Datasheet HTML 7Page - Agilent(Hewlett-Packard) FS2101 Datasheet HTML 8Page - Agilent(Hewlett-Packard) FS2101 Datasheet HTML 9Page - Agilent(Hewlett-Packard) FS2101 Datasheet HTML 10Page - Agilent(Hewlett-Packard) FS2101 Datasheet HTML 11Page - Agilent(Hewlett-Packard) FS2101 Datasheet HTML 12Page - Agilent(Hewlett-Packard) FS2101 Datasheet HTML 13Page - Agilent(Hewlett-Packard) FS2101 Datasheet HTML 14Page - Agilent(Hewlett-Packard) FS2101 Datasheet HTML 15Page - Agilent(Hewlett-Packard) Next Button
Zoom Inzoom in Zoom Outzoom out
 11 / 48 page
background image
11
PCI Active Analysis Probe front panel
The active circuitry on the PCI Active Analysis Probe module
gets its power from the logic analyzer PODs. No power is taken
from the target PCI system. Please Note: If the Analysis Probe
is plugged into the PCI bus and the logic analyzer is not
connected or powered up the input buffers on the Analysis
Probe will create a low impedance path to ground thus
inhibiting the PCI local bus and any card in the extender
card connector from working.
The Logic analyzer must be connected and powered on for
the PCI Active Analysis Probe to work properly. ONLY
connect to the analysis probe headers 7-10 if you are doing
64 bit analysis. Latchup may occur on the 64 bit interface
parts if they are powered on and not on a 64 bit bus.
The following explains how to connect the logic analyzer to the
PCI Active Analysis Probe for either state or timing analysis:
1.
Remove the probe tip assemblies from the logic analyzer
cables.
2.
Plug the logic analyzer cables into the PCI Active
Analysis Probe cable headers as shown in the
appropriate following tables.
Parity On
No Wait
No Idle
State
ON
Parity On
No Wait
No Idle
TD0-TD1
State
Timing
FuturePlus
Systems
Powering the PCI
Active Analysis
Probe
Connecting to the
PCI Active Analysis
Probe



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48


データシート ダウンロード

Go To PDF Page


リンク URL



ALLDATASHEETはお客様のビジネスに役立ちますか?  [ DONATE ] 

Alldatasheetは   |   広告   |   お問い合わせ   |   プライバシーポリシー   |   データシートへのリンク    |   リンク交換   |   メーカーリスト
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com