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ST7LITEU09 データシート(PDF) 77 Page - STMicroelectronics

部品番号 ST7LITEU09
部品情報  8-bit MCU with single voltage Flash memory, ADC, timers
PDF  115 Pages
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メーカー  STMICROELECTRONICS [STMicroelectronics]
ホームページ  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

ST7LITEU09 データシート(HTML) 77 Page - STMicroelectronics

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13.3.2 Operating Conditions with Low Voltage Detector (LVD)
TA = -40 to 125°C, unless otherwise specified
Notes:
1. Not tested in production.
2. Not tested in production. The VDD rise time rate condition is needed to ensure a correct device power-on and LVD reset
release. When the VDD slope is outside these values, the LVD may not release properly the reset of the MCU.
3. Use of LVD with capacitive power supply: with this type of power supply, if power cuts occur in the application, it is
recommended to pull VDD down to 0V to ensure optimum restart conditions. Refer to circuit example in Figure 66 on page
97.
13.3.3 Auxiliary Voltage Detector (AVD) Thresholds
TA = -40 to 125°C, unless otherwise specified
Note:
1. Not tested in production, guaranteed by characterization.
Note: Refer to section 8.4.2.1 on page 35
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
VIT+(LVD)
Reset release threshold
(VDD rise)
High Threshold
Med. Threshold
Low Threshold
3.9
3.2
2.5
4.2
3.5
2.7
4.5
3.8
3.0
V
VIT-(LVD)
Reset generation threshold
(VDD fall)
High Threshold
Med. Threshold
Low Threshold
3.7
3.0
2.4
4.0
3.3
2.6
4.3
3.6
2.9
Vhys
LVD voltage threshold hysteresis
VIT+(LVD)-VIT-(LVD)
150
mV
VtPOR
VDD rise time rate
2) 3)
20
µs/V
IDD(LVD)
1)
LVD/AVD current consumption
VDD = 5V
220
µA
Symbol
Parameter
Conditions
Min 1)
Typ 1)
Max 1)
Unit
VIT+(AVD)
1=>0 AVDF flag toggle threshold
(VDD rise)
High Threshold
Med. Threshold
Low Threshold
4.0
3.4
2.6
4.4
3.7
2.9
4.8
4.1
3.2
V
VIT-(AVD)
0=>1 AVDF flag toggle threshold
(VDD fall)
High Threshold
Med. Threshold
Low Threshold
3.9
3.3
2.5
4.3
3.6
2.8
4.7
4.0
3.1
Vhys
AVD voltage threshold hysteresis
VIT+(AVD)-VIT-(AVD)
150
mV
1



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