EM88F758NL44 datasheet(4/190 Pages) EMC

4 / 190 page

Contents



Product Specification (V1.1) 03.25.2016

6.1.31

Bank 0 R23: TCCD (TCC data register) .........................................................34

6.1.32

Bank 0 R24: TC1CR1 (Timer/Counter 1 Control Register 1)..........................34

6.1.33

Bank 0 R25: TC1CR2 (Timer/Counter 1 Control Register 2)..........................35

6.1.34

Bank 0 R26: TC1DA (Timer/Counter 1 Data Buffer A)....................................37

6.1.35

Bank 0 R27: TC1DB (Timer/Counter 1 Data Buffer B) ...................................37

6.1.36

Bank 0 R28: TC2CR1 (Timer/Counter 2 Control Register 1)..........................37

6.1.37

Bank 0 R29: TC2CR2 (Timer/Counter 2 Control Register 2)..........................38

6.1.38

Bank 0 R2A: TC2DA (Timer/Counter 2 Data Buffer A) ...................................39

6.1.39

Bank 0 R2B: TC2DB (Timer/Counter 2 Data Buffer B)...................................39

6.1.40

Bank 0 R2C: TC3CR1 (Timer/Counter 3 Control Register 1) .........................40

6.1.41

Bank 0 R2D: TC3CR2 (Timer/Counter 3 Control Register 2) .........................41

6.1.42

Bank 0 R2E: TC3DA (Timer/Counter 3 Data Buffer A) ...................................42

6.1.43

Bank 0 R2F: TC3DB (Timer/Counter 3 Data Buffer B) ...................................42

6.1.44

Bank 0 R30: I2CCR1 (I2C Status and Control Register 1).............................42

6.1.45

Bank 0 R31: I2CCR2 (I2C Status and Control Register 2).............................43

6.1.46

Bank 0 R32: I2CSA (I2C Slave Address Register) .........................................44

6.1.47

Bank 0 R33: I2CDB (I2C Data Buffer Register)..............................................45

6.1.48

Bank 0 R34: I2CDAL (I2C Device Address Register) .....................................45

6.1.49

Bank 0 R35: I2CDAH (I2C Device Address Register) ....................................45

6.1.50

Bank 0 R36: SPICR (SPI Control Register)....................................................45

6.1.51

Bank 0 R37: SPIS (SPI Status Register) ........................................................46

6.1.52

Bank 0 R38: SPIR (SPI Read Buffer Register)...............................................47

6.1.53

Bank 0 R39: SPIW (SPI Write Buffer Register) ..............................................47

6.1.54

Bank 0 R3A ~ R3D: (Reserved)......................................................................47

6.1.55

Bank 0 R3E: ADCR1 (ADC Control Register 1) .............................................48

6.1.56

Bank 0 R3F: ADCR2 (ADC Control Register 2)..............................................49

6.1.57

Bank 0 R40: ADISR (Analog to Digital Converter Input Channel Selection

6.1.58

Bank 0 R41: ADER 1 (Analog to Digital Converter Input Control Register 1) 51

6.1.59

Bank 0 R42: (Reserved) .................................................................................51

6.1.60

Bank 0 R43: ADDL (Low Byte of Analog to Digital Converter Data)...............52

6.1.61

Bank 0 R44: ADDH (High Byte of Analog to Digital Converter Data) .............52

6.1.62

Bank 0 R45 ADCVL (Low Byte of Analog to Digital Converter Comparison) .52

6.1.63

Bank 0 R46 ADCVH (High Byte of Analog to Digital Converter Comparison) 52

6.1.64

Bank 0 R47 ~ R4F (Reserved) .......................................................................53

6.1.65

Bank 1 R5 IOCR8 (I/O Port 8 Control Register) .............................................53

6.1.66

Bank 1 R6 IOCR9 (I/O Port 9 Control Register) .............................................53

6.1.67

Bank 1 R7 IOCRA (IO Port A Control Register)..............................................53

6.1.68

Bank 1 R8: P5PHCR (Port 5 Pull-high Control Register) ...............................53

6.1.69

Bank 1 R9: P6PHCR (Port 6 Pull-high Control Register) ...............................54

6.1.70

Bank 1 RA: P789APHCR (Port 7~A Pull-high Control Register) ....................54

6.1.71

Bank 1 RB: P5PLCR (Port 5 Pull-low Control Register).................................55

6.1.72

Bank 1 RC: P6PLCR (Port 6 Pull-low Control Register).................................55

6.1.73

Bank 1 RD: P789APLCR (Ports 7~A Pull-low Control Register) ....................56

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