RZSLASHT2ME datasheet(7/116 Pages) RENESAS

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Table 1.8

Communication interfaces (2 of 3)

Feature

Functional description

Serial communication interface (SCI)

● 6 channels

● 5 communication mode

– Asynchronous interfaces

– 8-bit clock synchronous interface

– Simple I2C (master-only)

– Simple SPI

– Smart card interface

● Clock source is select from among four internal clock signals

● Bit rate specifiable with the on-chip baud rate generator

● Full-duplex and half-duplex communication

● Data length: 7 to 9 bits (Asynchronous mode)

● Bit rate modulation

● Double speed mode (Asynchronous, Clock Synchronous, Simple SPI mode)

● RS-485 driver control function (Asynchronous mode)

● Loopback function to enable self-diagnosis (Asynchronous, Clock synchronous mode)

I2C bus interface (IIC)

● 3 channels

● Communication formats: I2C bus format or SMBus format

● Master or slave mode selectable

● Supports the multi-master

● Maximum transfer rate: 400 kbps (Standard mode and Fast mode)

CAN-FD module (CANFD)

● 2 channels

● Comply with CAN-FD ISO 11898-1 (2015)

● Communication speed

– Classical CAN mode: 1 Mbps

– CAN FD mode:

Nominal bit rate: max. 1 Mbps

Data bit rate: max. 8 Mbps

● Total 192 message buffers (in case frame size is 76 bytes)

– Individual buffers: 64 for TX

– Shared buffers: 128 for TX and RX including FIFO

● Selectable ID type with 11-bit Standard and 18-bit Extended

● Selectable Frame type: Data Frame and Remote Frame

● Up to 256 receive rules

Serial peripheral interface (SPI)

● 4 channels

● SPI transfer facility

Using the MOSI (master out slave in), MISO (master in slave out), SSL (slave select), and

RSPCK (SPI clock) signals enables serial transfer through SPI operation (four lines) or

clock-synchronous operation (three lines) capable of handling serial transfer as a master or

slave

● Data formats

– Switching between MSB first and LSB first

– Transfer bit length selectable to 4 - 32 bits

– 32 bits × 4-stage FIFO transmit and receive buffers

– Up to four frames can be transmitted or received in a single transfer operation (with

each frame having up to 32 bits)

● RSPCK can be stopped automatically with the reception buffer full for master reception

RZ/T2ME Datasheet

1. Overview

R01DS0441EJ0110 Rev.1.10

Mar 13, 2026

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