Data Sheet

ADRF5717

PIN CONFIGURATION AND FUNCTION DESCRIPTIONS

analog.com

Rev. 0 | 8 of 15

Figure 4. Pin Configuration (Top View)

Table 6. Pin Function Descriptions

Pin No.

Mnemonic

Description

1 to 3, 5 to 11, 13,

17, 20

GND

Ground. The GND pins must be connected to the RF and DC ground of the PCB.

4

ATTIN

Attenuator Input. No DC blocking capacitor is necessary when the RF line potential is equal to 0 V DC. See Figure 5 for the

interface schematic.

12

ATTOUT

Attenuator Output. No DC blocking capacitor is necessary when the RF line potential is equal to 0 V DC. See Figure 5 for the

interface schematic.

14

VSS

Negative Supply Input. See Figure 8 for the interface schematic.

15

VDD

Positive Supply Input. See Figure 7 for the interface schematic.

16

LE

Latch Enable Input. See the Theory of Operation section for more information. See Figure 6 for the interface schematic.

18

D5

Parallel Control Input for 16 dB Attenuation Bit. See the Theory of Operation section for more information. See Figure 6 for the

interface schematic.

19

D6

Parallel Control Input for 16 dB Attenuation Bit. See the Theory of Operation section for more information. See Figure 6 for the

interface schematic.

EPAD

Exposed Pad. The exposed pad must be connected to the RF and DC ground of the PCB.