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HD64F2149YV データシート(PDF) 148 Page - Renesas Technology Corp |
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HD64F2149YV データシート(HTML) 148 Page - Renesas Technology Corp |
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148 / 1075 page  Section 5 Interrupt Controller Rev. 3.00 Jan 18, 2006 page 120 of 1044 REJ09B0280-0300 Vector Address Interrupt Source Origin of Interrupt Source Vector Number Normal Mode Advanced Mode ICR Priority IICI0 (1-byte transmission/ reception completed) DDCSWI (format switch) IIC channel 0 92 93 H'00B8 H'00BA H'000170 H'000174 ICRC4 High IICI1 (1-byte transmission/ reception completed) Reserved IIC channel 1 94 95 H'00BC H'00BE H'000178 H'00017C ICRC3 PS2IA (reception completed A) PS2IB (reception completed B) PS2IC (reception completed C) Reserved Keyboard buffer controller (PS2) 96 97 98 99 H'00C0 H'00C2 H'00C4 H'00C6 H'000180 H'000184 H'000188 H'00018C ICRB0 Reserved — 100 to 103 H'00C8 to H'00CE H'000190 to H'00019C ERRI (transfer error, etc.) IBFI1 (IDR1 reception completed) IBFI2 (IDR2 reception completed) IBFI3 (IDR3 reception completed) Host interface (LPC) 104 105 106 107 H'00D8 H'00DA H'00DC H'00DE H'0001B0 H'0001B4 H'0001B8 H'0001BC ICRC1 Low |
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