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H8SX1663 データシート(PDF) 598 Page - Renesas Technology Corp

部品番号 H8SX1663
部品情報  Renesas 32-Bit CISC Microcomputer H8SX Family / H8SX/1600 Series
PDF  1158 Pages
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メーカー  RENESAS [Renesas Technology Corp]
ホームページ  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

H8SX1663 データシート(HTML) 598 Page - Renesas Technology Corp

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Section 10 16-Bit Timer Pulse Unit (TPU)
Rev.1.00 Jun. 07, 2006 Page 546 of 1102
REJ09B0294-0100
• When TGR is an input capture register
When input capture occurs, the value in TCNT is transferred to TGR and the value previously
held in TGR is transferred to the buffer register.
This operation is illustrated in figure 10.13.
Buffer register
Timer general
register
TCNT
Input capture
signal
Figure 10.13 Input Capture Buffer Operation
(1) Example of Buffer Operation Setting Procedure
Figure 10.14 shows an example of the buffer operation setting procedure.
Select TGR function
Buffer operation
Set buffer operation
Start count
<Buffer operation>
[1]
[2]
[3]
[1] Designate TGR as an input capture register or
output compare register by means of TIOR.
[2] Designate TGR for buffer operation with bits
BFA and BFB in TMDR.
[3] Set the CST bit in TSTR to 1 to start the count
operation.
Figure 10.14 Example of Buffer Operation Setting Procedure



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