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M30620ECFS データシート(PDF) 66 Page - Renesas Technology Corp |
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M30620ECFS データシート(HTML) 66 Page - Renesas Technology Corp |
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66 / 621 page  Mitsubishi microcomputers M16C / 62 Group SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER Interrupt 51 • Maskable interrupt : An interrupt which can be enabled (disabled) by the interrupt enable flag (I flag) or whose interrupt priority can be changed by priority level. • Non-maskable interrupt : An interrupt which cannot be enabled (disabled) by the interrupt enable flag (I flag) or whose interrupt priority cannot be changed by priority level. Figure 1.14.1. Classification of interrupts Interrupt Software Hardware Special Peripheral I/O (Note) Undefined instruction (UND instruction) Overflow (INTO instruction) BRK instruction INT instruction Reset _______ NMI ________ DBC Watchdog timer Single step Address matched Note: Peripheral I/O interrupts are generated by the peripheral functions built into the microcomputer system. Overview of Interrupt Type of Interrupts Figure 1.14.1 lists the types of interrupts. |
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